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Commit 2d33ced5 authored by Biju Das's avatar Biju Das Committed by Simon Horman
Browse files

ARM: dts: r8a7743: Add I2C DT support 



Add the I2C[0-5] devices to the r8a7743 device tree.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent bf38b9ac

arch/arm/boot/dts/r8a7743.dtsi

+97 −0
Original line number Diff line number Diff line
@@ -18,6 +18,15 @@ 
	#address-cells = <2>;

	#size-cells = <2>;



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		i2c3 = &i2c3;

		i2c4 = &i2c4;

		i2c5 = &i2c5;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -314,6 +323,94 @@ 
			dma-channels = <15>;

		};



		/* The memory map in the User's Manual maps the cores to bus

		 *  numbers

		 */

		i2c0: i2c@e6508000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6508000 0 0x40>;

			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 931>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 931>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c1: i2c@e6518000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6518000 0 0x40>;

			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 930>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 930>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c2: i2c@e6530000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6530000 0 0x40>;

			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 929>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 929>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c3: i2c@e6540000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6540000 0 0x40>;

			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 928>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 928>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c4: i2c@e6520000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6520000 0 0x40>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 927>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 927>;

			i2c-scl-internal-delay-ns = <6>;

			status = "disabled";

		};



		i2c5: i2c@e6528000 {

			/* doesn't need pinmux */

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "renesas,i2c-r8a7743",

				     "renesas,rcar-gen2-i2c";

			reg = <0 0xe6528000 0 0x40>;

			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 925>;

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

			resets = <&cpg 925>;

			i2c-scl-internal-delay-ns = <110>;

			status = "disabled";

		};



		scifa0: serial@e6c40000 {

			compatible = "renesas,scifa-r8a7743",

				     "renesas,rcar-gen2-scifa", "renesas,scifa";