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Commit 2d24b532 authored by Steven King's avatar Steven King Committed by Greg Ungerer
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m68knommu: platform support for i2c devices on ColdFire SoC 



These changes based on work by Steven King <sfking@fdwdc.com> to support
the i2c hardware modules on ColdFire SoC family devices.

This is the per SoC hardware support. Contains a common platform device
setup. Each of the SoC family members tends to have some minor local
setup required to initialize the module. But all ColdFire family members
use the same i2c hardware module.

This i2c hardware module is the same as used in the Freescale iMX ARM
based family of SoC devices. Steven's original patches were based on using
a new and different i2c-coldfire.c driver. But this is not neccessary as
we can use the existing Linux i2c-imx.c driver with no change required to
it. And this patch is now based on using the existing i2c-imx driver.

This patch only contains the ColdFire platform changes.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
Tested-by: default avatarAngelo Dureghello <angelo@sysam.it>
parent 3e5de27e

arch/m68k/coldfire/device.c

+159 −0
Original line number Diff line number Diff line
@@ -327,6 +327,147 @@ static struct platform_device mcf_qspi = { 
};

#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */



#if IS_ENABLED(CONFIG_I2C_IMX)

static struct resource mcf_i2c0_resources[] = {

	{

		.start          = MCFI2C_BASE0,

		.end            = MCFI2C_BASE0 + MCFI2C_SIZE0 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C0,

		.end            = MCF_IRQ_I2C0,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c0 = {

	.name                   = "imx1-i2c",

	.id                     = 0,

	.num_resources          = ARRAY_SIZE(mcf_i2c0_resources),

	.resource               = mcf_i2c0_resources,

};

#ifdef MCFI2C_BASE1



static struct resource mcf_i2c1_resources[] = {

	{

		.start          = MCFI2C_BASE1,

		.end            = MCFI2C_BASE1 + MCFI2C_SIZE1 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C1,

		.end            = MCF_IRQ_I2C1,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c1 = {

	.name                   = "imx1-i2c",

	.id                     = 1,

	.num_resources          = ARRAY_SIZE(mcf_i2c1_resources),

	.resource               = mcf_i2c1_resources,

};



#endif /* MCFI2C_BASE1 */



#ifdef MCFI2C_BASE2



static struct resource mcf_i2c2_resources[] = {

	{

		.start          = MCFI2C_BASE2,

		.end            = MCFI2C_BASE2 + MCFI2C_SIZE2 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C2,

		.end            = MCF_IRQ_I2C2,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c2 = {

	.name                   = "imx1-i2c",

	.id                     = 2,

	.num_resources          = ARRAY_SIZE(mcf_i2c2_resources),

	.resource               = mcf_i2c2_resources,

};



#endif /* MCFI2C_BASE2 */



#ifdef MCFI2C_BASE3



static struct resource mcf_i2c3_resources[] = {

	{

		.start          = MCFI2C_BASE3,

		.end            = MCFI2C_BASE3 + MCFI2C_SIZE3 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C3,

		.end            = MCF_IRQ_I2C3,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c3 = {

	.name                   = "imx1-i2c",

	.id                     = 3,

	.num_resources          = ARRAY_SIZE(mcf_i2c3_resources),

	.resource               = mcf_i2c3_resources,

};



#endif /* MCFI2C_BASE3 */



#ifdef MCFI2C_BASE4



static struct resource mcf_i2c4_resources[] = {

	{

		.start          = MCFI2C_BASE4,

		.end            = MCFI2C_BASE4 + MCFI2C_SIZE4 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C4,

		.end            = MCF_IRQ_I2C4,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c4 = {

	.name                   = "imx1-i2c",

	.id                     = 4,

	.num_resources          = ARRAY_SIZE(mcf_i2c4_resources),

	.resource               = mcf_i2c4_resources,

};



#endif /* MCFI2C_BASE4 */



#ifdef MCFI2C_BASE5



static struct resource mcf_i2c5_resources[] = {

	{

		.start          = MCFI2C_BASE5,

		.end            = MCFI2C_BASE5 + MCFI2C_SIZE5 - 1,

		.flags          = IORESOURCE_MEM,

	},

	{

		.start          = MCF_IRQ_I2C5,

		.end            = MCF_IRQ_I2C5,

		.flags          = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_i2c5 = {

	.name                   = "imx1-i2c",

	.id                     = 5,

	.num_resources          = ARRAY_SIZE(mcf_i2c5_resources),

	.resource               = mcf_i2c5_resources,

};



#endif /* MCFI2C_BASE5 */

#endif /* IS_ENABLED(CONFIG_I2C_IMX) */



static struct platform_device *mcf_devices[] __initdata = {

	&mcf_uart,

#if IS_ENABLED(CONFIG_FEC)
@@ -338,6 +479,24 @@ static struct platform_device *mcf_devices[] __initdata = { 
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)

	&mcf_qspi,

#endif

#if IS_ENABLED(CONFIG_I2C_IMX)

	&mcf_i2c0,

#ifdef MCFI2C_BASE1

	&mcf_i2c1,

#endif

#ifdef MCFI2C_BASE2

	&mcf_i2c2,

#endif

#ifdef MCFI2C_BASE3

	&mcf_i2c3,

#endif

#ifdef MCFI2C_BASE4

	&mcf_i2c4,

#endif

#ifdef MCFI2C_BASE5

	&mcf_i2c5,

#endif

#endif

};



/*

arch/m68k/coldfire/m5206.c

+12 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 
DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);

DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);

DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);

DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);



struct clk *mcf_clks[] = {

	&clk_pll,
@@ -34,11 +35,21 @@ struct clk *mcf_clks[] = { 
	&clk_mcftmr1,

	&clk_mcfuart0,

	&clk_mcfuart1,

	&clk_mcfi2c0,

	NULL

};



/***************************************************************************/



static void __init m5206_i2c_init(void)

{

#if IS_ENABLED(CONFIG_I2C_IMX)

	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,

	       MCFSIM_I2CICR);

	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);

#endif /* IS_ENABLED(CONFIG_I2C_IMX) */

}



void __init config_BSP(char *commandp, int size)

{

#if defined(CONFIG_NETtel)
@@ -53,6 +64,7 @@ void __init config_BSP(char *commandp, int size) 
	mcf_mapirq2imr(25, MCFINTC_EINT1);

	mcf_mapirq2imr(28, MCFINTC_EINT4);

	mcf_mapirq2imr(31, MCFINTC_EINT7);

	m5206_i2c_init();

}



/***************************************************************************/

arch/m68k/coldfire/m520x.c

+20 −4
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ DEFINE_CLK(0, "fec.0", 12, MCF_CLK); 
DEFINE_CLK(0, "edma", 17, MCF_CLK);

DEFINE_CLK(0, "intc.0", 18, MCF_CLK);

DEFINE_CLK(0, "iack.0", 21, MCF_CLK);

DEFINE_CLK(0, "mcfi2c.0", 22, MCF_CLK);

DEFINE_CLK(0, "imx1-i2c.0", 22, MCF_CLK);

DEFINE_CLK(0, "mcfqspi.0", 23, MCF_CLK);

DEFINE_CLK(0, "mcfuart.0", 24, MCF_BUSCLK);

DEFINE_CLK(0, "mcfuart.1", 25, MCF_BUSCLK);
@@ -53,7 +53,7 @@ struct clk *mcf_clks[] = { 
	&__clk_0_17, /* edma */

	&__clk_0_18, /* intc.0 */

	&__clk_0_21, /* iack.0 */

	&__clk_0_22, /* mcfi2c.0 */

	&__clk_0_22, /* imx1-i2c.0 */

	&__clk_0_23, /* mcfqspi.0 */

	&__clk_0_24, /* mcfuart.0 */

	&__clk_0_25, /* mcfuart.1 */
@@ -94,7 +94,7 @@ static struct clk * const enable_clks[] __initconst = { 
static struct clk * const disable_clks[] __initconst = {

	&__clk_0_12, /* fec.0 */

	&__clk_0_17, /* edma */

	&__clk_0_22, /* mcfi2c.0 */

	&__clk_0_22, /* imx1-i2c.0 */

	&__clk_0_23, /* mcfqspi.0 */

	&__clk_0_28, /* mcftmr.0 */

	&__clk_0_29, /* mcftmr.1 */
@@ -133,6 +133,21 @@ static void __init m520x_qspi_init(void) 


/***************************************************************************/



static void __init m520x_i2c_init(void)

{

#if IS_ENABLED(CONFIG_I2C_IMX)

	u8 par;



	/* setup Port FECI2C Pin Assignment Register for I2C */

	/*  set PAR_SCL to SCL and PAR_SDA to SDA */

	par = readb(MCF_GPIO_PAR_FECI2C);

	par |= 0x0f;

	writeb(par, MCF_GPIO_PAR_FECI2C);

#endif /* IS_ENABLED(CONFIG_I2C_IMX) */

}



/***************************************************************************/



static void __init m520x_uarts_init(void)

{

	u16 par;
@@ -175,6 +190,7 @@ void __init config_BSP(char *commandp, int size) 
	m520x_uarts_init();

	m520x_fec_init();

	m520x_qspi_init();

	m520x_i2c_init();

}



/***************************************************************************/

arch/m68k/coldfire/m523x.c

+18 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 
DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);

DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);

DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);

DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);



struct clk *mcf_clks[] = {

	&clk_pll,
@@ -47,6 +48,7 @@ struct clk *mcf_clks[] = { 
	&clk_mcfuart2,

	&clk_mcfqspi0,

	&clk_fec0,

	&clk_mcfi2c0,

	NULL

};
@@ -68,6 +70,21 @@ static void __init m523x_qspi_init(void) 


/***************************************************************************/



static void __init m523x_i2c_init(void)

{

#if IS_ENABLED(CONFIG_I2C_IMX)

	u8 par;



	/* setup Port AS Pin Assignment Register for I2C */

	/*  set PASPA0 to SCL and PASPA1 to SDA */

	par = readb(MCFGPIO_PAR_FECI2C);

	par |= 0x0f;

	writeb(par, MCFGPIO_PAR_FECI2C);

#endif /* IS_ENABLED(CONFIG_I2C_IMX) */

}



/***************************************************************************/



static void __init m523x_fec_init(void)

{

	/* Set multi-function pins to ethernet use */
@@ -81,6 +98,7 @@ void __init config_BSP(char *commandp, int size) 
	mach_sched_init = hw_timer_init;

	m523x_fec_init();

	m523x_qspi_init();

	m523x_i2c_init();

}



/***************************************************************************/

arch/m68k/coldfire/m5249.c

+25 −0
Original line number Diff line number Diff line
@@ -27,6 +27,8 @@ DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 
DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);

DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);

DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);

DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);

DEFINE_CLK(mcfi2c1, "imx1-i2c.1", MCF_BUSCLK);



struct clk *mcf_clks[] = {

	&clk_pll,
@@ -36,6 +38,8 @@ struct clk *mcf_clks[] = { 
	&clk_mcfuart0,

	&clk_mcfuart1,

	&clk_mcfqspi0,

	&clk_mcfi2c0,

	&clk_mcfi2c1,

	NULL

};
@@ -85,6 +89,26 @@ static void __init m5249_qspi_init(void) 


/***************************************************************************/



static void __init m5249_i2c_init(void)

{

#if IS_ENABLED(CONFIG_I2C_IMX)

	u32 r;



	/* first I2C controller uses regular irq setup */

	writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,

	       MCFSIM_I2CICR);

	mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);



	/* second I2C controller is completely different */

	r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));

	r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1);

	r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1);

	writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));

#endif /* CONFIG_I2C_IMX */

}



/***************************************************************************/



#ifdef CONFIG_M5249C3



static void __init m5249_smc91x_init(void)
@@ -111,6 +135,7 @@ void __init config_BSP(char *commandp, int size) 
	m5249_smc91x_init();

#endif

	m5249_qspi_init();

	m5249_i2c_init();

}



/***************************************************************************/