Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2c95a810 authored by Sean Paul's avatar Sean Paul Committed by Jingoo Han
Browse files

video: exynos_dp: Remove sink control to D0 



According to DP spec, it is not required in the Link Training
procedure.

[jg1.han@samsung.com: modified the commit message]
Signed-off-by: default avatarSean Paul <seanpaul@chromium.org>
Signed-off-by: default avatarJingoo Han <jg1.han@samsung.com>
parent 1cefc1d6

drivers/video/exynos/exynos_dp_core.c

+0 −6
Original line number Diff line number Diff line
@@ -278,12 +278,6 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp) 
	for (lane = 0; lane < lane_count; lane++)

		dp->link_train.cr_loop[lane] = 0;



	/* Set sink to D0 (Sink Not Ready) mode. */

	retval = exynos_dp_write_byte_to_dpcd(dp, DPCD_ADDR_SINK_POWER_STATE,

			DPCD_SET_POWER_STATE_D0);

	if (retval)

		return retval;



	/* Set link rate and count as you want to establish*/

	exynos_dp_set_link_bandwidth(dp, dp->link_train.link_rate);

	exynos_dp_set_lane_count(dp, dp->link_train.lane_count);