Commit 2c81a10a authored May 22, 2014 by Chen Zhen Committed by Mark Brown May 26, 2014

ASoC: max98090: Add NI/MI values for user pclk 19.2 MHz



This patch adds the clock divisor and multiplier NI, MI values for audio
sampling frequencies 44100 and 48000 Hz and PCLK 19.2 MHz. This is useful
for the Odroid X2/U2 boards when the codec works in master mode and its
MCLK clock is fed from the I2S CDCLK output.

Signed-off-by: Chen Zhen <zhen1.chen@samsung.com>
[s.nawrocki@samsung.com: edited the commit description]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

parent a735d992

sound/soc/codecs/max98090.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -1545,19 +1545,19 @@ static const int lrclk_rates[] = {
		};

		static const int user_pclk_rates[] = {
		13000000, 13000000
		13000000, 13000000, 19200000, 19200000,
		};

		static const int user_lrclk_rates[] = {
		44100, 48000
		44100, 48000, 44100, 48000,
		};

		static const unsigned long long ni_value[] = {
		3528, 768
		3528, 768, 441, 8
		};

		static const unsigned long long mi_value[] = {
		8125, 1625
		8125, 1625, 1500, 25
		};

		static void max98090_configure_bclk(struct snd_soc_codec *codec)