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Commit 2c63935d authored by Stephen Boyd's avatar Stephen Boyd
Browse files

clk: pxa: Remove CLK_IS_ROOT 



This flag is a no-op now. Remove usage of the flag.

Acked-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 615b34de

drivers/clk/pxa/clk-pxa25x.c

+3 −5
Original line number Diff line number Diff line
@@ -200,12 +200,10 @@ static void __init pxa25x_register_core(void) 
static void __init pxa25x_register_plls(void)

{

	clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				3686400);

				CLK_GET_RATE_NOCACHE, 3686400);

	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				32768);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);

				CLK_GET_RATE_NOCACHE, 32768);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);

	clk_register_fixed_factor(NULL, "ppll_95_85mhz", "osc_3_6864mhz",

				  0, 26, 1);

	clk_register_fixed_factor(NULL, "ppll_147_46mhz", "osc_3_6864mhz",

drivers/clk/pxa/clk-pxa27x.c

+3 −3
Original line number Diff line number Diff line
@@ -208,12 +208,12 @@ MUX_RO_RATE_RO_OPS(clk_pxa27x_lcd_base, "lcd_base"); 
static void __init pxa27x_register_plls(void)

{

	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				CLK_GET_RATE_NOCACHE,

				13 * MHz);

	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				CLK_GET_RATE_NOCACHE,

				32768 * KHz);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);

	clk_register_fixed_factor(NULL, "ppll_312mhz", "osc_13mhz", 0, 24, 1);

}

drivers/clk/pxa/clk-pxa3xx.c

+4 −4
Original line number Diff line number Diff line
@@ -284,15 +284,15 @@ static void __init pxa3xx_register_core(void) 
static void __init pxa3xx_register_plls(void)

{

	clk_register_fixed_rate(NULL, "osc_13mhz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				CLK_GET_RATE_NOCACHE,

				13 * MHz);

	clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				CLK_GET_RATE_NOCACHE,

				32768);

	clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,

				CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,

				CLK_GET_RATE_NOCACHE,

				120 * MHz);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);

	clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);

	clk_register_fixed_factor(NULL, "spll_624mhz", "osc_13mhz", 0, 48, 1);

	clk_register_fixed_factor(NULL, "ring_osc_60mhz", "ring_osc_120mhz",

				  0, 1, 2);