Loading drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c +6 −5 Original line number Diff line number Diff line Loading @@ -33,16 +33,17 @@ static u32 gf100_fuse_rd32(struct nvkm_object *object, u64 addr) { struct gf100_fuse *fuse = (void *)object; struct nvkm_device *device = fuse->base.subdev.device; unsigned long flags; u32 fuse_enable, unk, val; /* racy if another part of nvkm start writing to these regs */ spin_lock_irqsave(&fuse->fuse_enable_lock, flags); fuse_enable = nv_mask(fuse, 0x22400, 0x800, 0x800); unk = nv_mask(fuse, 0x21000, 0x1, 0x1); val = nv_rd32(fuse, 0x21100 + addr); nv_wr32(fuse, 0x21000, unk); nv_wr32(fuse, 0x22400, fuse_enable); fuse_enable = nvkm_mask(device, 0x22400, 0x800, 0x800); unk = nvkm_mask(device, 0x21000, 0x1, 0x1); val = nvkm_rd32(device, 0x21100 + addr); nvkm_wr32(device, 0x21000, unk); nvkm_wr32(device, 0x22400, fuse_enable); spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags); return val; } Loading drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c +2 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,8 @@ static u32 gm107_fuse_rd32(struct nvkm_object *object, u64 addr) { struct nvkm_fuse *fuse = (void *)object; return nv_rd32(fuse, 0x21100 + addr); struct nvkm_device *device = fuse->subdev.device; return nvkm_rd32(device, 0x21100 + addr); } Loading drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c +4 −3 Original line number Diff line number Diff line Loading @@ -33,14 +33,15 @@ static u32 nv50_fuse_rd32(struct nvkm_object *object, u64 addr) { struct nv50_fuse *fuse = (void *)object; struct nvkm_device *device = fuse->base.subdev.device; unsigned long flags; u32 fuse_enable, val; /* racy if another part of nvkm start writing to this reg */ spin_lock_irqsave(&fuse->fuse_enable_lock, flags); fuse_enable = nv_mask(fuse, 0x1084, 0x800, 0x800); val = nv_rd32(fuse, 0x21000 + addr); nv_wr32(fuse, 0x1084, fuse_enable); fuse_enable = nvkm_mask(device, 0x1084, 0x800, 0x800); val = nvkm_rd32(device, 0x21000 + addr); nvkm_wr32(device, 0x1084, fuse_enable); spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags); return val; } Loading Loading
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.c +6 −5 Original line number Diff line number Diff line Loading @@ -33,16 +33,17 @@ static u32 gf100_fuse_rd32(struct nvkm_object *object, u64 addr) { struct gf100_fuse *fuse = (void *)object; struct nvkm_device *device = fuse->base.subdev.device; unsigned long flags; u32 fuse_enable, unk, val; /* racy if another part of nvkm start writing to these regs */ spin_lock_irqsave(&fuse->fuse_enable_lock, flags); fuse_enable = nv_mask(fuse, 0x22400, 0x800, 0x800); unk = nv_mask(fuse, 0x21000, 0x1, 0x1); val = nv_rd32(fuse, 0x21100 + addr); nv_wr32(fuse, 0x21000, unk); nv_wr32(fuse, 0x22400, fuse_enable); fuse_enable = nvkm_mask(device, 0x22400, 0x800, 0x800); unk = nvkm_mask(device, 0x21000, 0x1, 0x1); val = nvkm_rd32(device, 0x21100 + addr); nvkm_wr32(device, 0x21000, unk); nvkm_wr32(device, 0x22400, fuse_enable); spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags); return val; } Loading
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.c +2 −1 Original line number Diff line number Diff line Loading @@ -27,7 +27,8 @@ static u32 gm107_fuse_rd32(struct nvkm_object *object, u64 addr) { struct nvkm_fuse *fuse = (void *)object; return nv_rd32(fuse, 0x21100 + addr); struct nvkm_device *device = fuse->subdev.device; return nvkm_rd32(device, 0x21100 + addr); } Loading
drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.c +4 −3 Original line number Diff line number Diff line Loading @@ -33,14 +33,15 @@ static u32 nv50_fuse_rd32(struct nvkm_object *object, u64 addr) { struct nv50_fuse *fuse = (void *)object; struct nvkm_device *device = fuse->base.subdev.device; unsigned long flags; u32 fuse_enable, val; /* racy if another part of nvkm start writing to this reg */ spin_lock_irqsave(&fuse->fuse_enable_lock, flags); fuse_enable = nv_mask(fuse, 0x1084, 0x800, 0x800); val = nv_rd32(fuse, 0x21000 + addr); nv_wr32(fuse, 0x1084, fuse_enable); fuse_enable = nvkm_mask(device, 0x1084, 0x800, 0x800); val = nvkm_rd32(device, 0x21000 + addr); nvkm_wr32(device, 0x1084, fuse_enable); spin_unlock_irqrestore(&fuse->fuse_enable_lock, flags); return val; } Loading