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Commit 2bd1f73f authored by Mengdong Lin's avatar Mengdong Lin Committed by Takashi Iwai
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ALSA: hda - remove controller dependency on i915 power well for Baytrail/Braswell



For Baytrail (Valleyview) and Braswell (Cherryview), only the HDMI codec is
in the display power well while the HD-A controller isn't. So the controller
flag 'need_i915_power' is not set to release the display power after probe,
and the codec flag 'link_power_control" is set to request/release the display
power via bus link_power ops.

Signed-off-by: default avatarMengdong Lin <mengdong.lin@intel.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 795614dd
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+4 −2
Original line number Diff line number Diff line
@@ -1900,9 +1900,11 @@ static int azx_probe_continue(struct azx *chip)
	 * display codec needs the power and it can be released after probe.
	 */
	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
		/* Assume the controller needs the power by default */
		/* Baytral/Braswell controllers don't need this power */
		if (pci->device != 0x0f04 && pci->device != 0x2284)
			hda->need_i915_power = 1;


#ifdef CONFIG_SND_HDA_I915
		err = hda_i915_init(hda);
		if (err < 0)
+9 −0
Original line number Diff line number Diff line
@@ -2335,6 +2335,15 @@ static int patch_generic_hdmi(struct hda_codec *codec)
		intel_haswell_fixup_enable_dp12(codec);
	}

	/* For Valleyview/Cherryview, only the display codec is in the display
	 * power well and can use link_power ops to request/release the power.
	 * For Haswell/Broadwell, the controller is also in the power well and
	 * can cover the codec power request, and so need not set this flag.
	 * For previous platforms, there is no such power well feature.
	 */
	if (is_valleyview_plus(codec))
		codec->core.link_power_control = 1;

	if (is_haswell_plus(codec) || is_valleyview_plus(codec))
		codec->depop_delay = 0;