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Commit 2b885ea6 authored by Antony Pavlov's avatar Antony Pavlov Committed by Ralf Baechle
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dt-bindings: clock: qca,ath79-pll: fix copy-paste typos



Signed-off-by: default avatarAntony Pavlov <antonynpavlov@gmail.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Cc: Alban Bedel <albeu@free.fr>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12869/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 3b143cca
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+3 −3
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.

Required Properties:
- compatible: has to be "qca,<soctype>-cpu-intc" and one of the following
- compatible: has to be "qca,<soctype>-pll" and one of the following
  fallbacks:
  - "qca,ar7100-pll"
  - "qca,ar7240-pll"
@@ -21,8 +21,8 @@ Optional properties:

Example:

	memory-controller@18050000 {
		compatible = "qca,ar9132-ppl", "qca,ar9130-pll";
	pll-controller@18050000 {
		compatible = "qca,ar9132-pll", "qca,ar9130-pll";
		reg = <0x18050000 0x20>;

		clock-names = "ref";
+1 −1
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@
			};

			pll: pll-controller@18050000 {
				compatible = "qca,ar9132-ppl",
				compatible = "qca,ar9132-pll",
						"qca,ar9130-pll";
				reg = <0x18050000 0x20>;