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Commit 2b3a765d authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/cik: move sdma tiling config setup into sdma code 



Split sdma and gfx programming.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d93f3ca7

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

+5 −0
Original line number Diff line number Diff line
@@ -393,6 +393,9 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev) 
		cik_srbm_select(adev, 0, 0, 0, 0);

		mutex_unlock(&adev->srbm_mutex);



		WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],

		       adev->gfx.config.gb_addr_config & 0x70);



		WREG32(mmSDMA0_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);

		WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);
@@ -1065,6 +1068,8 @@ static void cik_sdma_print_status(void *handle) 
			 i, RREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i]));

		dev_info(adev->dev, "  SDMA%d_GFX_RB_BASE_HI=0x%08X\n",

			 i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i]));

		dev_info(adev->dev, "  SDMA%d_TILING_CONFIG=0x%08X\n",

			 i, RREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i]));

		mutex_lock(&adev->srbm_mutex);

		for (j = 0; j < 16; j++) {

			cik_srbm_select(adev, 0, 0, 0, j);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+0 −6
Original line number Diff line number Diff line
@@ -1721,8 +1721,6 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev) 
	WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

	WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

	WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);

	WREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET, adev->gfx.config.gb_addr_config & 0x70);

	WREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET, adev->gfx.config.gb_addr_config & 0x70);

	WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

	WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

	WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);
@@ -4602,10 +4600,6 @@ static void gfx_v7_0_print_status(void *handle) 
		 RREG32(mmHDP_ADDR_CONFIG));

	dev_info(adev->dev, "  DMIF_ADDR_CALC=0x%08X\n",

		 RREG32(mmDMIF_ADDR_CALC));

	dev_info(adev->dev, "  SDMA0_TILING_CONFIG=0x%08X\n",

		 RREG32(mmSDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET));

	dev_info(adev->dev, "  SDMA1_TILING_CONFIG=0x%08X\n",

		 RREG32(mmSDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET));

	dev_info(adev->dev, "  UVD_UDEC_ADDR_CONFIG=0x%08X\n",

		 RREG32(mmUVD_UDEC_ADDR_CONFIG));

	dev_info(adev->dev, "  UVD_UDEC_DB_ADDR_CONFIG=0x%08X\n",