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Commit 2a7275a3 authored by Ley Foon Tan's avatar Ley Foon Tan Committed by Bjorn Helgaas
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PCI: altera: Fix TLP_CFG_DW0 for TLP write 



eb576712 ("PCI: altera: Simplify TLB_CFG_DW0 usage") used
TLP_FMTTYPE_CFGRD* (instead of TLP_FMTTYPE_CFGWR*) for TLP writes, which
causes writing to configuration space to fail.  Fix it by using correct
FMTTYPE for write operation.

Fixes: eb576712 ("PCI: altera: Simplify TLB_CFG_DW0 usage")
Signed-off-by: default avatarLey Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org	# v4.9+
parent c0464062

drivers/pci/host/pcie-altera.c

+7 −3
Original line number Diff line number Diff line
@@ -57,10 +57,14 @@ 
#define TLP_WRITE_TAG			0x10

#define RP_DEVFN			0

#define TLP_REQ_ID(bus, devfn)		(((bus) << 8) | (devfn))

#define TLP_CFG_DW0(pcie, bus)						\

#define TLP_CFGRD_DW0(pcie, bus)					\

    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0			\

				    : TLP_FMTTYPE_CFGRD1) << 24) |	\

     TLP_PAYLOAD_SIZE)

#define TLP_CFGWR_DW0(pcie, bus)					\

    ((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0			\

				    : TLP_FMTTYPE_CFGWR1) << 24) |	\

     TLP_PAYLOAD_SIZE)

#define TLP_CFG_DW1(pcie, tag, be)	\

    (((TLP_REQ_ID(pcie->root_bus_nr,  RP_DEVFN)) << 16) | (tag << 8) | (be))

#define TLP_CFG_DW2(bus, devfn, offset)	\
@@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn, 
{

	u32 headers[TLP_HDR_SIZE];



	headers[0] = TLP_CFG_DW0(pcie, bus);

	headers[0] = TLP_CFGRD_DW0(pcie, bus);

	headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);

	headers[2] = TLP_CFG_DW2(bus, devfn, where);
@@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn, 
	u32 headers[TLP_HDR_SIZE];

	int ret;



	headers[0] = TLP_CFG_DW0(pcie, bus);

	headers[0] = TLP_CFGWR_DW0(pcie, bus);

	headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);

	headers[2] = TLP_CFG_DW2(bus, devfn, where);