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Commit 299cc3c1 authored by Linus Torvalds's avatar Linus Torvalds
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Fix up more strange byte writes to the PCI_ROM_ADDRESS config word



It's a dword thing, and the value we write is a dword.  Doing a byte
write to it is nonsensical, and writes only the low byte, which only
contains the enable bit.  So we enable a nonsensical address (usually
zero), which causes the controller no end of problems.

Trivial fix, but nasty to find.

Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 2f4ba45a
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+1 −1
Original line number Diff line number Diff line
@@ -608,7 +608,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha

#ifdef __i386__
	if (dev->resource[PCI_ROM_RESOURCE].start) {
		pci_write_config_byte(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
		pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
		printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
	}
#endif
+1 −1
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha

	if (cmd & PCI_COMMAND_MEMORY) {
		if (pci_resource_start(dev, PCI_ROM_RESOURCE)) {
			pci_write_config_byte(dev, PCI_ROM_ADDRESS,
			pci_write_config_dword(dev, PCI_ROM_ADDRESS,
				dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
			printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
				dev->resource[PCI_ROM_RESOURCE].start);