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Commit 298f2a3a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx into next/dt64

Pull "arm64: Xilinx ZynqMP DT fixes for v4.14" from Michal Simek:

- Fix DTC warnings
- Add idle states, OP, cci-400, RTC, pcie prefetchable memory
  fpd/lpd dmas, clocks for ep108
- Enable can1
- Fix smmu IRQ, aliases, uart compatible string
- Use generic compatible string for i2c eeprom

* tag 'zynqmp-dt-for-4.14' of https://github.com/Xilinx/linux-xlnx:
  arm64: zynqmp: Add generic compatible string for I2C EEPROM
  arm64: zynqmp: Add missing mmc aliases in ep108
  arm64: zynqmp: Enable can1 for ep108
  arm64: zynqmp: Added clocks to DT for ep108
  arm64: zynqmp: Use C pre-processor for includes
  arm64: zynqmp: Add fpd/lpd dmas
  arm64: zynqmp: Set status disabled in dtsi
  arm64: zynqmp: Add new uartps compatible string
  arm64: zynqmp: Correct IRQ nr for the SMMU
  arm64: zynqmp: Add support for RTC
  arm64: zynqmp: Adding prefetchable memory space to pcie node
  arm64: zynqmp: Add CCI-400 node
  arm64: zynqmp: Add dcc console for zynqmp
  arm64: zynqmp: Add operating points
  arm64: zynqmp: Add idle state for ZynqMP
  arm64: zynqmp: Add references to cpu nodes
  arm64: zynqmp: Move nodes which have no reg property out of bus
  arm64: zynqmp: Remove leading 0s from mtd table for spi flashes
  arm64: dts: xilinx: fix PCI bus dtc warnings
parents b2d3b787 0bb6f25a
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+49 −1
Original line number Original line Diff line number Diff line
@@ -11,7 +11,7 @@
 * the License, or (at your option) any later version.
 * the License, or (at your option) any later version.
 */
 */


&amba {
/ {
	misc_clk: misc_clk {
	misc_clk: misc_clk {
		compatible = "fixed-clock";
		compatible = "fixed-clock";
		#clock-cells = <0>;
		#clock-cells = <0>;
@@ -29,12 +29,60 @@
		#clock-cells = <0>;
		#clock-cells = <0>;
		clock-frequency = <75000000>;
		clock-frequency = <75000000>;
	};
	};

	clk100: clk100 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};

	clk600: clk600 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <600000000>;
	};
};
};


&can0 {
&can0 {
	clocks = <&misc_clk &misc_clk>;
	clocks = <&misc_clk &misc_clk>;
};
};


&can1 {
	clocks = <&misc_clk &misc_clk>;
};

&fpd_dma_chan1 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan2 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan3 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan4 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan5 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan6 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan7 {
	clocks = <&clk600>, <&clk100>;
};

&fpd_dma_chan8 {
	clocks = <&clk600>, <&clk100>;
};

&gem0 {
&gem0 {
	clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
	clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
};
};
+12 −6
Original line number Original line Diff line number Diff line
@@ -13,13 +13,15 @@


/dts-v1/;
/dts-v1/;


/include/ "zynqmp.dtsi"
#include "zynqmp.dtsi"
/include/ "zynqmp-ep108-clk.dtsi"
#include "zynqmp-ep108-clk.dtsi"


/ {
/ {
	model = "ZynqMP EP108";
	model = "ZynqMP EP108";


	aliases {
	aliases {
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
		serial0 = &uart0;
		serial0 = &uart0;
	};
	};


@@ -37,6 +39,10 @@
	status = "okay";
	status = "okay";
};
};


&can1 {
	status = "okay";
};

&gem0 {
&gem0 {
	status = "okay";
	status = "okay";
	phy-handle = <&phy0>;
	phy-handle = <&phy0>;
@@ -55,7 +61,7 @@
	status = "okay";
	status = "okay";
	clock-frequency = <400000>;
	clock-frequency = <400000>;
	eeprom@54 {
	eeprom@54 {
		compatible = "at,24c64";
		compatible = "atmel,24c64";
		reg = <0x54>;
		reg = <0x54>;
	};
	};
};
};
@@ -64,7 +70,7 @@
	status = "okay";
	status = "okay";
	clock-frequency = <400000>;
	clock-frequency = <400000>;
	eeprom@55 {
	eeprom@55 {
		compatible = "at,24c64";
		compatible = "atmel,24c64";
		reg = <0x55>;
		reg = <0x55>;
	};
	};
};
};
@@ -92,7 +98,7 @@
		spi-max-frequency = <50000000>;
		spi-max-frequency = <50000000>;
		reg = <0>;
		reg = <0>;


		spi0_flash0@00000000 {
		spi0_flash0@0 {
			label = "spi0_flash0";
			label = "spi0_flash0";
			reg = <0x0 0x100000>;
			reg = <0x0 0x100000>;
		};
		};
@@ -109,7 +115,7 @@
		spi-max-frequency = <50000000>;
		spi-max-frequency = <50000000>;
		reg = <0>;
		reg = <0>;


		spi1_flash0@00000000 {
		spi1_flash0@0 {
			label = "spi1_flash0";
			label = "spi1_flash0";
			reg = <0x0 0x100000>;
			reg = <0x0 0x100000>;
		};
		};
+260 −17
Original line number Original line Diff line number Diff line
@@ -20,35 +20,86 @@
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;


		cpu@0 {
		cpu0: cpu@0 {
			compatible = "arm,cortex-a53", "arm,armv8";
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			device_type = "cpu";
			enable-method = "psci";
			enable-method = "psci";
			operating-points-v2 = <&cpu_opp_table>;
			reg = <0x0>;
			reg = <0x0>;
			cpu-idle-states = <&CPU_SLEEP_0>;
		};
		};


		cpu@1 {
		cpu1: cpu@1 {
			compatible = "arm,cortex-a53", "arm,armv8";
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			device_type = "cpu";
			enable-method = "psci";
			enable-method = "psci";
			reg = <0x1>;
			reg = <0x1>;
			operating-points-v2 = <&cpu_opp_table>;
			cpu-idle-states = <&CPU_SLEEP_0>;
		};
		};


		cpu@2 {
		cpu2: cpu@2 {
			compatible = "arm,cortex-a53", "arm,armv8";
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			device_type = "cpu";
			enable-method = "psci";
			enable-method = "psci";
			reg = <0x2>;
			reg = <0x2>;
			operating-points-v2 = <&cpu_opp_table>;
			cpu-idle-states = <&CPU_SLEEP_0>;
		};
		};


		cpu@3 {
		cpu3: cpu@3 {
			compatible = "arm,cortex-a53", "arm,armv8";
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			device_type = "cpu";
			enable-method = "psci";
			enable-method = "psci";
			reg = <0x3>;
			reg = <0x3>;
			operating-points-v2 = <&cpu_opp_table>;
			cpu-idle-states = <&CPU_SLEEP_0>;
		};

		idle-states {
			entry-method = "arm,psci";

			CPU_SLEEP_0: cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x40000000>;
				local-timer-stop;
				entry-latency-us = <300>;
				exit-latency-us = <600>;
				min-residency-us = <10000>;
			};
		};
	};

	cpu_opp_table: cpu_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		opp00 {
			opp-hz = /bits/ 64 <1199999988>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <500000>;
		};
		opp01 {
			opp-hz = /bits/ 64 <599999994>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <500000>;
		};
		opp02 {
			opp-hz = /bits/ 64 <399999996>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <500000>;
		};
		opp03 {
			opp-hz = /bits/ 64 <299999997>;
			opp-microvolt = <1000000>;
			clock-latency-ns = <500000>;
		};
		};
	};
	};


	dcc: dcc {
		compatible = "arm,dcc";
		status = "disabled";
	};

	pmu {
	pmu {
		compatible = "arm,armv8-pmuv3";
		compatible = "arm,armv8-pmuv3";
		interrupt-parent = <&gic>;
		interrupt-parent = <&gic>;
@@ -119,6 +170,190 @@
			rx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
		};
		};


		cci: cci@fd6e0000 {
			compatible = "arm,cci-400";
			reg = <0x0 0xfd6e0000 0x0 0x9000>;
			ranges = <0x0 0x0 0xfd6e0000 0x10000>;
			#address-cells = <1>;
			#size-cells = <1>;

			pmu@9000 {
				compatible = "arm,cci-400-pmu,r1";
				reg = <0x9000 0x5000>;
				interrupt-parent = <&gic>;
				interrupts = <0 123 4>,
					     <0 123 4>,
					     <0 123 4>,
					     <0 123 4>,
					     <0 123 4>;
			};
		};

		/* GDMA */
		fpd_dma_chan1: dma@fd500000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd500000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 124 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan2: dma@fd510000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd510000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 125 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan3: dma@fd520000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd520000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 126 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan4: dma@fd530000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd530000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 127 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan5: dma@fd540000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd540000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 128 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan6: dma@fd550000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd550000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 129 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan7: dma@fd560000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd560000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 130 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		fpd_dma_chan8: dma@fd570000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd570000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 131 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <128>;
		};

		/* LPDDMA default allows only secured access. inorder to enable
		 * These dma channels, Users should ensure that these dma
		 * Channels are allowed for non secure access.
		 */
		lpd_dma_chan1: dma@ffa80000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffa80000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 77 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan2: dma@ffa90000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffa90000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 78 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan3: dma@ffaa0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffaa0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 79 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan4: dma@ffab0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffab0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 80 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan5: dma@ffac0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffac0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 81 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan6: dma@ffad0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffad0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 82 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan7: dma@ffae0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffae0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 83 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		lpd_dma_chan8: dma@ffaf0000 {
			status = "disabled";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffaf0000 0x0 0x1000>;
			interrupt-parent = <&gic>;
			interrupts = <0 84 4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <64>;
		};

		gem0: ethernet@ff0b0000 {
		gem0: ethernet@ff0b0000 {
			compatible = "cdns,gem";
			compatible = "cdns,gem";
			status = "disabled";
			status = "disabled";
@@ -215,12 +450,9 @@
			      <0x0 0xfd480000 0x0 0x1000>,
			      <0x0 0xfd480000 0x0 0x1000>,
			      <0x80 0x00000000 0x0 0x1000000>;
			      <0x80 0x00000000 0x0 0x1000000>;
			reg-names = "breg", "pcireg", "cfg";
			reg-names = "breg", "pcireg", "cfg";
			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000	/* non-prefetchable memory */
				  0xe0000000 0x00000000 0x10000000
				  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
				  /* non-prefetchable memory */
			bus-range = <0x00 0xff>;
				  0x43000000 0x00000006 0x00000000 0x00000006
				  0x00000000 0x00000002 0x00000000>;
				  /* prefetchable memory */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
@@ -233,6 +465,16 @@
			};
			};
		};
		};


		rtc: rtc@ffa60000 {
			compatible = "xlnx,zynqmp-rtc";
			status = "disabled";
			reg = <0x0 0xffa60000 0x0 0x100>;
			interrupt-parent = <&gic>;
			interrupts = <0 26 4>, <0 27 4>;
			interrupt-names = "alarm", "sec";
			calibration = <0x8000>;
		};

		sata: ahci@fd0c0000 {
		sata: ahci@fd0c0000 {
			compatible = "ceva,ahci-1v84";
			compatible = "ceva,ahci-1v84";
			status = "disabled";
			status = "disabled";
@@ -262,13 +504,14 @@
		smmu: smmu@fd800000 {
		smmu: smmu@fd800000 {
			compatible = "arm,mmu-500";
			compatible = "arm,mmu-500";
			reg = <0x0 0xfd800000 0x0 0x20000>;
			reg = <0x0 0xfd800000 0x0 0x20000>;
			status = "disabled";
			#global-interrupts = <1>;
			#global-interrupts = <1>;
			interrupt-parent = <&gic>;
			interrupt-parent = <&gic>;
			interrupts = <0 157 4>,
			interrupts = <0 155 4>,
				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>;
				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
		};
		};


		spi0: spi@ff040000 {
		spi0: spi@ff040000 {
@@ -330,7 +573,7 @@
		};
		};


		uart0: serial@ff000000 {
		uart0: serial@ff000000 {
			compatible = "cdns,uart-r1p8";
			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
			status = "disabled";
			status = "disabled";
			interrupt-parent = <&gic>;
			interrupt-parent = <&gic>;
			interrupts = <0 21 4>;
			interrupts = <0 21 4>;
@@ -339,7 +582,7 @@
		};
		};


		uart1: serial@ff010000 {
		uart1: serial@ff010000 {
			compatible = "cdns,uart-r1p8";
			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
			status = "disabled";
			status = "disabled";
			interrupt-parent = <&gic>;
			interrupt-parent = <&gic>;
			interrupts = <0 22 4>;
			interrupts = <0 22 4>;