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Commit 295952a1 authored by Kieran Bingham's avatar Kieran Bingham Committed by Simon Horman
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arm64: dts: renesas: r8a77995: add VSP instances 



The r8a77995 has a VSPBS to support image processing such as blending of
two input images, and has two VSPDs to handle display pipelines with a
DU.

Signed-off-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
[simon: updated base address of vsp node to fea28000]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent d7ef367b

arch/arm64/boot/dts/renesas/r8a77995.dtsi

+30 −0
Original line number Diff line number Diff line
@@ -692,6 +692,16 @@ 
			status = "disabled";

		};



		vspbs: vsp@fe960000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfe960000 0 0x8000>;

			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 627>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 627>;

			renesas,fcp = <&fcpvb0>;

		};



		fcpvb0: fcp@fe96f000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfe96f000 0 0x200>;
@@ -701,6 +711,16 @@ 
			iommus = <&ipmmu_vp0 5>;

		};



		vspd0: vsp@fea20000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea20000 0 0x8000>;

			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 623>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 623>;

			renesas,fcp = <&fcpvd0>;

		};



		fcpvd0: fcp@fea27000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfea27000 0 0x200>;
@@ -710,6 +730,16 @@ 
			iommus = <&ipmmu_vi0 8>;

		};



		vspd1: vsp@fea28000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea28000 0 0x8000>;

			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 622>;

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 622>;

			renesas,fcp = <&fcpvd1>;

		};



		fcpvd1: fcp@fea2f000 {

			compatible = "renesas,fcpv";

			reg = <0 0xfea2f000 0 0x200>;