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Commit 292889e1 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Extract i845_cursor_ctl() and i9xx_cursor_ctl() 



Pull the code to calculate the cursor control register value into
separate functions. Allows us to pre-compute them in the future.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170317211808.14693-8-ville.syrjala@linux.intel.com


Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 0a375147

drivers/gpu/drm/i915/intel_display.c

+72 −47
Original line number Diff line number Diff line
@@ -9179,17 +9179,10 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, 
	return active;

}



static void i845_update_cursor(struct drm_crtc *crtc, u32 base,

static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state,

			   const struct intel_plane_state *plane_state)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	uint32_t cntl = 0, size = 0;



	if (plane_state && plane_state->base.visible) {

	unsigned int width = plane_state->base.crtc_w;

		unsigned int height = plane_state->base.crtc_h;

	unsigned int stride = roundup_pow_of_two(width) * 4;



	switch (stride) {
@@ -9205,11 +9198,26 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base, 
		break;

	}



		cntl |= CURSOR_ENABLE |

	return CURSOR_ENABLE |

		CURSOR_GAMMA_ENABLE |

		CURSOR_FORMAT_ARGB |

		CURSOR_STRIDE(stride);

}



static void i845_update_cursor(struct drm_crtc *crtc, u32 base,

			       const struct intel_crtc_state *crtc_state,

			       const struct intel_plane_state *plane_state)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	uint32_t cntl = 0, size = 0;



	if (plane_state && plane_state->base.visible) {

		unsigned int width = plane_state->base.crtc_w;

		unsigned int height = plane_state->base.crtc_h;



		cntl = i845_cursor_ctl(crtc_state, plane_state);

		size = (height << 12) | width;

	}
@@ -9242,17 +9250,22 @@ static void i845_update_cursor(struct drm_crtc *crtc, u32 base, 
	}

}



static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base,

static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,

			   const struct intel_plane_state *plane_state)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int pipe = intel_crtc->pipe;

	uint32_t cntl = 0;

	struct drm_i915_private *dev_priv =

		to_i915(plane_state->base.plane->dev);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);

	enum pipe pipe = crtc->pipe;

	u32 cntl;



	if (plane_state && plane_state->base.visible) {

	cntl = MCURSOR_GAMMA_ENABLE;



	if (HAS_DDI(dev_priv))

		cntl |= CURSOR_PIPE_CSC_ENABLE;



	cntl |= pipe << 28; /* Connect to correct pipe */



	switch (plane_state->base.crtc_w) {

	case 64:

		cntl |= CURSOR_MODE_64_ARGB_AX;
@@ -9265,17 +9278,28 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, 
		break;

	default:

		MISSING_CASE(plane_state->base.crtc_w);

				return;

		return 0;

	}

		cntl |= pipe << 28; /* Connect to correct pipe */



		if (HAS_DDI(dev_priv))

			cntl |= CURSOR_PIPE_CSC_ENABLE;



	if (plane_state->base.rotation & DRM_ROTATE_180)

		cntl |= CURSOR_ROTATE_180;



	return cntl;

}



static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base,

			       const struct intel_crtc_state *crtc_state,

			       const struct intel_plane_state *plane_state)

{

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int pipe = intel_crtc->pipe;

	uint32_t cntl = 0;



	if (plane_state && plane_state->base.visible)

		cntl = i9xx_cursor_ctl(crtc_state, plane_state);



	if (intel_crtc->cursor_cntl != cntl) {

		I915_WRITE_FW(CURCNTR(pipe), cntl);

		POSTING_READ_FW(CURCNTR(pipe));
@@ -9291,6 +9315,7 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base, 


/* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */

static void intel_crtc_update_cursor(struct drm_crtc *crtc,

				     const struct intel_crtc_state *crtc_state,

				     const struct intel_plane_state *plane_state)

{

	struct drm_device *dev = crtc->dev;
@@ -9330,9 +9355,9 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc, 
	I915_WRITE_FW(CURPOS(pipe), pos);



	if (IS_I845G(dev_priv) || IS_I865G(dev_priv))

		i845_update_cursor(crtc, base, plane_state);

		i845_update_cursor(crtc, base, crtc_state, plane_state);

	else

		i9xx_update_cursor(crtc, base, plane_state);

		i9xx_update_cursor(crtc, base, crtc_state, plane_state);



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -13762,7 +13787,7 @@ intel_disable_cursor_plane(struct drm_plane *plane, 
	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);



	intel_crtc->cursor_addr = 0;

	intel_crtc_update_cursor(crtc, NULL);

	intel_crtc_update_cursor(crtc, NULL, NULL);

}



static void
@@ -13784,7 +13809,7 @@ intel_update_cursor_plane(struct drm_plane *plane, 
		addr = obj->phys_handle->busaddr;



	intel_crtc->cursor_addr = addr;

	intel_crtc_update_cursor(crtc, state);

	intel_crtc_update_cursor(crtc, crtc_state, state);

}



static struct intel_plane *