Loading drivers/staging/fw-api/fw/dbglog.h +6 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2016 The Linux Foundation. All rights reserved. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -32,6 +33,8 @@ #include "athstartpack.h" #endif #include <a_types.h> /* A_UINT32 */ #include <a_osapi.h> /* PREPACK */ #include <wlan_module_ids.h> #ifdef __cplusplus Loading Loading @@ -88,7 +91,9 @@ typedef enum { DBGLOG_INFO_LVL_2, DBGLOG_WARN, DBGLOG_ERR, DBGLOG_LVL_MAX DBGLOG_LVL_MAX, DBGLOG_INVALID = 0xf }DBGLOG_LOG_LVL; PREPACK struct dbglog_buf_s { Loading drivers/staging/fw-api/fw/htt.h +189 −34 Original line number Diff line number Diff line Loading @@ -260,9 +260,13 @@ * msg defs. * 3.131 Add H2T TYPE_MSDUQ_RECFG_REQ + T2H MSDUQ_CFG_IND msg defs. * 3.132 Add flow_classification_3_tuple_field_enable in H2T 3_TUPLE_HASH_CFG. * 3.133 Add packet_type_enable_data_flags fields in rx_ring_selection_cfg. * 3.134 Add qdata_refill flag in rx_peer_metadata_v1a. * 3.135 Add HTT_HOST4_TO_FW_RXBUF_RING def. * 3.136 Add htt_ext_present flag in htt_tx_tcl_global_seq_metadata. */ #define HTT_CURRENT_VERSION_MAJOR 3 #define HTT_CURRENT_VERSION_MINOR 132 #define HTT_CURRENT_VERSION_MINOR 136 #define HTT_NUM_TX_FRAG_DESC 1024 Loading Loading @@ -827,7 +831,8 @@ typedef enum { HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198, /* htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv */ HTT_STATS_GTX_TAG = 199, /* htt_stats_gtx_tlv */ HTT_STATS_TX_PDEV_WIFI_RADAR_TAG = 200, /* htt_stats_tx_pdev_wifi_radar_tlv */ HTT_STATS_TXBF_OFDMA_BE_PARBW_TAG = 201, /* htt_stats_txbf_ofdma_be_parbw_tlv */ HTT_STATS_RX_PDEV_RSSI_HIST_TAG = 202, /* htt_stats_rx_pdev_rssi_hist_tlv */ HTT_STATS_MAX_TAG, } htt_stats_tlv_tag_t; Loading Loading @@ -2695,7 +2700,7 @@ typedef struct { type: 2, /* vdev_id based or peer_id or svc_id or global seq based */ host_inspected: 1, global_seq_no: 12, rsvd: 1, htt_ext_present:1, padding: 16; /* These 16 bits cannot be used by FW for the tcl command */ } htt_tx_tcl_global_seq_metadata; Loading Loading @@ -2738,6 +2743,13 @@ PREPACK struct htt_tx_tcl_metadata_v2 { #define HTT_TX_TCL_METADATA_GLBL_SEQ_NO_M 0x00007ff8 #define HTT_TX_TCL_METADATA_GLBL_SEQ_NO_S 3 /* HTT ext present flag: * Specify whether there is a htt ext desc present for this packet, * accompanying the global seq no metadata. */ #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_M 0x00008000 #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S 15 /*----- Get and Set V2 type field in Vdev, Peer, Svc_Class_Id, Global_seq_no */ #define HTT_TX_TCL_METADATA_TYPE_V2_GET(_var) \ Loading Loading @@ -2825,6 +2837,15 @@ PREPACK struct htt_tx_tcl_metadata_v2 { ((_var) |= ((_val) << HTT_TX_TCL_METADATA_GLBL_SEQ_NO_S)); \ } while (0) #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_GET(_var) \ (((_var) & HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_M) >> \ HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S) #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT, _val); \ ((_var) |= ((_val) << HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S)); \ } while (0) /*------------------------------------------------------------------ * End V2 Version of TCL Data Command *-----------------------------------------------------------------*/ Loading Loading @@ -5452,6 +5473,7 @@ enum htt_srng_ring_id { HTT_RX_MON_MON2HOST_DEST_RING, /* Used by monitor to fill status buffers and provide to host */ HTT_LPASS_TO_FW_RXBUF_RING, /* new LPASS to FW refill ring to recycle rx buffers */ HTT_HOST3_TO_FW_RXBUF_RING, /* used by host for EasyMesh feature */ HTT_HOST4_TO_FW_RXBUF_RING, /* fourth ring used by host to provide buffers for MGMT packets */ /* Add Other SRING which can't be directly configured by host software above this line */ }; Loading Loading @@ -5790,38 +5812,39 @@ enum htt_srng_ring_id { * * The message would appear as follows: * * |31 28|27|26|25|24|23|22|21 19|18 16|15 | 11| 10|9 8|7 0| * |-----+--+--+--+--+-----------------+----+---+---+---+---------------| * |rsvd1|DT|OV|PS|SS| ring_id | pdev_id | msg_type | * |-----------------------+-----+-----+--------------------------------| * |31 29|28|27|26|25|24|23|22|21 19|18 16|15 | 11| 10|9 8|7 0| * |-----+--+--+--+--+--+-----------------+----+---+---+---+---------------| * |rsvd1|ED|DT|OV|PS|SS| ring_id | pdev_id | msg_type | * |--------------------------+-----+-----+--------------------------------| * | rsvd2 |RX|RXHDL| CLD | CLC | CLM | ring_buffer_size | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_0 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_1 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_2 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_3 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | tlv_filter_in_flags | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_header_offset | rx_packet_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_mpdu_start_offset | rx_mpdu_end_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_msdu_start_offset | rx_msdu_end_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rsvd3 | rx_attention_offset | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | rsvd4 | mo| fp| rx_drop_threshold | * | |ndp|ndp| | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * Where: * PS = pkt_swap * SS = status_swap * OV = rx_offsets_valid * DT = drop_thresh_valid * ED = packet type enable data flags fields present / valid * CLM = config_length_mgmt * CLC = config_length_ctrl * CLD = config_length_data Loading @@ -5846,8 +5869,12 @@ enum htt_srng_ring_id { * b'27 - drop_thresh_valid (DT): flag to indicate if the * rx_drop_threshold field is valid * b'28 - rx_mon_global_en: Enable/Disable global register 8 configuration in Rx monitor module. * b'29:31 - rsvd1: reserved for future use * configuration in Rx monitor module. * b'29 - packet_type_enable_data: flag to indicate whether * newer packet_type_enable_data_flags_* are valid or not * If not set, will use pkt_type_enable_flags for both status * and full pkt buffer configuration. * b'30:31 - rsvd1: reserved for future use * dword1 - b'0:15 - ring_buffer_size: size of bufferes referenced by rx ring, * in byte units. * Valid only for HW_TO_SW_RING and SW_TO_HW_RING Loading Loading @@ -6011,6 +6038,32 @@ enum htt_srng_ring_id { * 1: RX_PKT TLV logging at specified offset for the * subsequent buffer * b`15:1 - rx_pkt_tlv_offset: Qword offset for rx_packet TLVs. * dword18- b'0:19 - rx_mpdu_start_wmask_v2 - wmask address for rx mpdu start * b'20-27 - rx_mpdu_end_wmask_v2 - wmask addr for rx mpdu end tlv addr * b'28-31 - reserved * dword19- b'0-19 - rx_msdu_end_wmask_v2 * b'20-31 - reserved * dword20- b'0:19 - rx_ppdu_end_user_stats_wmask_v2 * offset for ppdu_end_user_stats tlv * b'20-31 - reserved * dword21- b'0-31 - packet_type_enable_fpmo_flags_0 - filter bmap for each * mode mgmt/ctrl type/subtype for fpmo mode * dword22- b'0-31 - packet_type_enable_fpmo_flags_1 - filter bmap for each * mode ctrl/data type/subtype for fpmo mode * dword23- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode MGMT type/subtype * dword24- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode MGMT type/subtype * dword25- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode CTRL type/subtype * dword26- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode CTRL/DATA type/subtype * dword27- b'0-31 - packet_type_enable_data_fpmo_flags_0 - filter bmap for * full pkt buffer each mode mgmt/ctrl type/subtype for * fpmo mode * dword28- b'0-31 - packet_type_enable_data_fpmo_flags_1 - filter bmap for * full pkt buffer each mode ctrl/data type/subtype for * fpmo mode */ PREPACK struct htt_rx_ring_selection_cfg_t { A_UINT32 msg_type: 8, Loading @@ -6021,7 +6074,8 @@ PREPACK struct htt_rx_ring_selection_cfg_t { rx_offsets_valid: 1, drop_thresh_valid: 1, rx_mon_global_en: 1, rsvd1: 3; packet_type_enable_data: 1, rsvd1: 2; A_UINT32 ring_buffer_size: 16, config_length_mgmt:3, config_length_ctrl:3, Loading Loading @@ -6075,6 +6129,12 @@ PREPACK struct htt_rx_ring_selection_cfg_t { rsvd10: 12; A_UINT32 packet_type_enable_fpmo_flags0; A_UINT32 packet_type_enable_fpmo_flags1; A_UINT32 packet_type_enable_data_flags_0; A_UINT32 packet_type_enable_data_flags_1; A_UINT32 packet_type_enable_data_flags_2; A_UINT32 packet_type_enable_data_flags_3; A_UINT32 packet_type_enable_data_fpmo_flags0; A_UINT32 packet_type_enable_data_fpmo_flags1; } POSTPACK; #define HTT_RX_RING_SELECTION_CFG_SZ (sizeof(struct htt_rx_ring_selection_cfg_t)) Loading Loading @@ -6156,6 +6216,17 @@ PREPACK struct htt_rx_ring_selection_cfg_t { ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MON_GLOBAL_EN_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_M 0x20000000 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S 29 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_M 0x0000ffff #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_S 0 #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_GET(_var) \ Loading Loading @@ -6644,6 +6715,74 @@ PREPACK struct htt_rx_ring_selection_cfg_t { ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_FPMO_FLAGS1_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_M 0xFFFFFFFF #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_M)>> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_M 0xFFFFFFFF #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_M)>> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S)); \ } while (0) /* * Subtype based MGMT frames enable bits. * FP: Filter_Pass, MD: Monitor_Direct MO: Monitor_Other Loading Loading @@ -20609,7 +20748,8 @@ PREPACK struct htt_rx_peer_metadata_v1a { vdev_id: 8, logical_link_id: 4, chip_id: 3, reserved2: 3; qdata_refill: 1, reserved2: 2; } POSTPACK; #define HTT_RX_PEER_META_DATA_V1A_PEER_ID_S 0 Loading Loading @@ -20667,6 +20807,17 @@ PREPACK struct htt_rx_peer_metadata_v1a { ((_var) |= ((_val) << HTT_RX_PEER_META_DATA_V1A_CHIP_ID_S)); \ } while (0) #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S 29 #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_M 0x20000000 #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_GET(_var) \ (((_var) & HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_M) >> HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S) #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL, _val); \ ((_var) |= ((_val) << HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S)); \ } while (0) /** * @brief target -> RX PEER METADATA V1B format Loading Loading @@ -20776,6 +20927,9 @@ extern void (*HTT_RX_PEER_META_DATA_CHIP_ID_SET) (A_UINT32 *var, A_UINT32 val); extern A_UINT32 (*HTT_RX_PEER_META_DATA_HW_LINK_ID_GET) (A_UINT32 var); extern void (*HTT_RX_PEER_META_DATA_HW_LINK_ID_SET) (A_UINT32 *var, A_UINT32 val); extern A_UINT32 (*HTT_RX_PEER_META_DATA_QDATA_REFILL_GET) (A_UINT32 var); extern void (*HTT_RX_PEER_META_DATA_QDATA_REFILL_SET) (A_UINT32 *var, A_UINT32 val); /* * In some systems, the host SW wants to specify priorities between Loading Loading @@ -22949,6 +23103,7 @@ typedef enum { HTT_SDWF_MSDUQ_CFG_IND_ERROR_DEACTIVATED_MSDUQ = 0x05, HTT_SDWF_MSDUQ_CFG_IND_ERROR_REACTIVATED_MSDUQ = 0x06, HTT_SDWF_MSDUQ_CFG_IND_ERROR_INVALID_SVC_CLASS = 0x07, HTT_SDWF_MSDUQ_CFG_IND_ERROR_TIDQ_LOCATE_ERROR = 0x08, } HTT_SDWF_MSDUQ_CFG_IND_ERROR_CODE_E; PREPACK struct htt_t2h_sdwf_msduq_cfg_ind { drivers/staging/fw-api/fw/htt_stats.h +328 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes drivers/staging/fw-api/fw/wlan_module_ids.h +38 −0 Original line number Diff line number Diff line Loading @@ -155,9 +155,47 @@ typedef enum { WLAN_MODULE_BRIDGE_PEER, /* 0x72 */ WLAN_MODULE_AUX_MAC_MGR, /* 0x73 */ WLAN_MODULE_TCAM, /* 0x74 */ WLAN_MODULE_P2P_R2, /* 0x75 */ WLAN_MODULE_SYSSW, /* 0x76 */ /* HDL MODULE IDS */ WLAN_MODULE_PHYLIB_RXDCOCAL, /* 0x77 */ WLAN_MODULE_PHYLIB_COMBCAL, /* 0x78 */ WLAN_MODULE_PHYLIB_TPCCAL, /* 0x79 */ WLAN_MODULE_PHYLIB_BBFILTCAL, /* 0x7a */ WLAN_MODULE_PHYLIB_PKTDETCAL, /* 0x7b */ WLAN_MODULE_PHYLIB_PAPRDCAL, /* 0x7c */ WLAN_MODULE_PHYLIB_NFCAL, /* 0x7d */ WLAN_MODULE_PHYLIB_ADCCAL, /* 0x7e */ WLAN_MODULE_PHYLIB_DACCAL, /* 0x7f */ WLAN_MODULE_PHYLIB_PALCAL, /* 0x80 */ WLAN_MODULE_PHYLIB_RXGAINCAL, /* 0x81 */ WLAN_MODULE_PHYLIB_CALUTILS, /* 0x82 */ WLAN_MODULE_PHYLIB_PHYRESET, /* 0x83 */ WLAN_MODULE_PHYLIB_RFACONFIG, /* 0x84 */ WLAN_MODULE_PHYLIB_SETCHAINMASK, /* 0x85 */ WLAN_MODULE_PHYLIB_SETXBAR, /* 0x86 */ WLAN_MODULE_PHYLIB_M3, /* 0x87 */ WLAN_MODULE_PHYLIB_COMMON, /* 0x88 */ WLAN_MODULE_PHYLIB_SPURMITT, /* 0x89 */ WLAN_MODULE_PHYLIB_RTT, /* 0x8a */ WLAN_MODULE_PHYLIB_FTPG, /* 0x8b */ WLAN_MODULE_PHYLIB_RSTCAL, /* 0x8c */ WLAN_MODULE_PHYLIB_RXBBFCAL, /* 0x8d */ WLAN_MODULE_PHYLIB_TIADCCAL, /* 0x8e */ WLAN_MODULE_PHYLIB_IM2CAL, /* 0x8f */ WLAN_MODULE_PHYLIB_PACCAL, /* 0x90 */ WLAN_MODULE_PHYLIB_PDCCAL, /* 0x91 */ WLAN_MODULE_PHYLIB_SPURCAL, /* 0x92 */ WLAN_MODULE_PHYLIB_PHYDBG, /* 0x93 */ WLAN_MODULE_PHYLIB_RRI, /* 0x94 */ WLAN_MODULE_PHYLIB_SSCAN, /* 0x95 */ WLAN_MODULE_PHYLIB_RSVD, /* 0x96 */ WLAN_MODULE_ID_MAX, WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX, WLAN_MODULE_ID_ALL = 0xffff /* wildcard to indicate all modules */ } WLAN_MODULE_ID; Loading drivers/staging/fw-api/fw/wmi_services.h +22 −1 Original line number Diff line number Diff line Loading @@ -656,12 +656,33 @@ typedef enum { WMI_SERVICE_DYNAMIC_WSI_REMAP_SUPPORT = 403, /* WSI bypass remap is supported by Firmware */ WMI_SERVICE_QMS_DLKM_SUPPORT = 404, /* DEPRECATED */ WMI_SERVICE_SMEM_MAILBOX_SUPPORT = 404, /* FW code has smem_mailbox support enabled */ WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* Indicate FW would send EXT2 REG_CC event having data which would be a continuation to EXT REG_CC event */ WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* DEPRECATED */ WMI_SERVICE_MLO_MODE2_RECOVERY_SUPPORTED = 406, /* Indicate FW support for MLO mode2 recovery */ WMI_SERVICE_MSDUQ_RECFG = 407, /* FW support the HTT MSDUQ_RECFG_REQ + MSDUQ_CFG_IND messages */ WMI_SERVICE_TRAFFIC_CONTEXT_SUPPORT = 408, /* FW supports traffic context aware manager */ WMI_SERVICE_STA_SAP_NDP_CONCURRENCY_SUPPORT = 409, /* FW supports STA + SAP + NDP concurrency */ WMI_SERVICE_THERM_THROT_POUT_REDUCTION = 410, /* FW supports thermal throttling Pout reduction */ WMI_SERVICE_E2E_SDWF_SUPPORT = 411, /* FW supports end-to-end SDWF features like SDWF scheduler */ WMI_SERVICE_EPM = 412, /* FW supports enhanced power management */ WMI_SERVICE_CHIPSET_LOGGING_SUPPORT = 413, /* FW supports chipset logging feature */ WMI_SERVICE_SUPPORT_AP_SUSPEND_RESUME = 414, /* FW supports SAP suspend feature */ WMI_SERVICE_STA_P2P_NDP_CONCURRENCY_SUPPORT = 415, /* FW supports STA + P2P + NAN concurrency */ WMI_SERVICE_USE_STA_VDEV_FOR_P2P_DEVICE = 416, /* FW supports use of sta vdev to be repurposed for p2p device */ WMI_SERVICE_AP_ASSISTED_DFS_CHAN_P2P_SESSION = 417, /* FW supports P2P session on DFS chan enabled by DFS master AP */ WMI_SERVICE_MLO_SAP_EMLSR_SUPPORT = 418, /* Indicates FW MLO SAP supports EMLSR Mode */ WMI_SERVICE_PKTLOG_ML_TSTMP_SUPPORT = 419, /* Indicates ML timestamp for pktlog */ WMI_SERVICE_MGMT_SRNG_SUPPORT = 420, /* FW supports MGMT frame forwarding via host provided SRNG instead of WMI */ WMI_SERVICE_WDS_NULL_FRAME_SUPPORT = 421, WMI_SERVICE_MLO_SAP_CONCURRENCY_SUPPORT = 422, /* Indicates FW supports MLO SAP+STA Concurrency */ WMI_SERVICE_MEC_AGING_TIMER_SUPPORT = 423, /* FW supports multicast echo check aging timer */ WMI_SERVICE_MULTI_RSNO_SUPPORT = 424, /* FW supports parsing of multiple RSN override IEs */ /* WMI_SERVICE_IS_TARGET_IPA: * FW indicates to host whether the target is IPA or xFEM. * If this flag is 0, the target is XFEM or unspecified. * If this flag is 1, the target is IPA. */ WMI_SERVICE_IS_TARGET_IPA = 425, WMI_SERVICE_THERM_THROT_TX_CHAIN_MASK = 426, /*FW supports thermal throttling dynamic Tx ChainMask update */ WMI_MAX_EXT2_SERVICE Loading Loading
drivers/staging/fw-api/fw/dbglog.h +6 −1 Original line number Diff line number Diff line /* * Copyright (c) 2012-2016 The Linux Foundation. All rights reserved. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * Loading Loading @@ -32,6 +33,8 @@ #include "athstartpack.h" #endif #include <a_types.h> /* A_UINT32 */ #include <a_osapi.h> /* PREPACK */ #include <wlan_module_ids.h> #ifdef __cplusplus Loading Loading @@ -88,7 +91,9 @@ typedef enum { DBGLOG_INFO_LVL_2, DBGLOG_WARN, DBGLOG_ERR, DBGLOG_LVL_MAX DBGLOG_LVL_MAX, DBGLOG_INVALID = 0xf }DBGLOG_LOG_LVL; PREPACK struct dbglog_buf_s { Loading
drivers/staging/fw-api/fw/htt.h +189 −34 Original line number Diff line number Diff line Loading @@ -260,9 +260,13 @@ * msg defs. * 3.131 Add H2T TYPE_MSDUQ_RECFG_REQ + T2H MSDUQ_CFG_IND msg defs. * 3.132 Add flow_classification_3_tuple_field_enable in H2T 3_TUPLE_HASH_CFG. * 3.133 Add packet_type_enable_data_flags fields in rx_ring_selection_cfg. * 3.134 Add qdata_refill flag in rx_peer_metadata_v1a. * 3.135 Add HTT_HOST4_TO_FW_RXBUF_RING def. * 3.136 Add htt_ext_present flag in htt_tx_tcl_global_seq_metadata. */ #define HTT_CURRENT_VERSION_MAJOR 3 #define HTT_CURRENT_VERSION_MINOR 132 #define HTT_CURRENT_VERSION_MINOR 136 #define HTT_NUM_TX_FRAG_DESC 1024 Loading Loading @@ -827,7 +831,8 @@ typedef enum { HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198, /* htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv */ HTT_STATS_GTX_TAG = 199, /* htt_stats_gtx_tlv */ HTT_STATS_TX_PDEV_WIFI_RADAR_TAG = 200, /* htt_stats_tx_pdev_wifi_radar_tlv */ HTT_STATS_TXBF_OFDMA_BE_PARBW_TAG = 201, /* htt_stats_txbf_ofdma_be_parbw_tlv */ HTT_STATS_RX_PDEV_RSSI_HIST_TAG = 202, /* htt_stats_rx_pdev_rssi_hist_tlv */ HTT_STATS_MAX_TAG, } htt_stats_tlv_tag_t; Loading Loading @@ -2695,7 +2700,7 @@ typedef struct { type: 2, /* vdev_id based or peer_id or svc_id or global seq based */ host_inspected: 1, global_seq_no: 12, rsvd: 1, htt_ext_present:1, padding: 16; /* These 16 bits cannot be used by FW for the tcl command */ } htt_tx_tcl_global_seq_metadata; Loading Loading @@ -2738,6 +2743,13 @@ PREPACK struct htt_tx_tcl_metadata_v2 { #define HTT_TX_TCL_METADATA_GLBL_SEQ_NO_M 0x00007ff8 #define HTT_TX_TCL_METADATA_GLBL_SEQ_NO_S 3 /* HTT ext present flag: * Specify whether there is a htt ext desc present for this packet, * accompanying the global seq no metadata. */ #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_M 0x00008000 #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S 15 /*----- Get and Set V2 type field in Vdev, Peer, Svc_Class_Id, Global_seq_no */ #define HTT_TX_TCL_METADATA_TYPE_V2_GET(_var) \ Loading Loading @@ -2825,6 +2837,15 @@ PREPACK struct htt_tx_tcl_metadata_v2 { ((_var) |= ((_val) << HTT_TX_TCL_METADATA_GLBL_SEQ_NO_S)); \ } while (0) #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_GET(_var) \ (((_var) & HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_M) >> \ HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S) #define HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT, _val); \ ((_var) |= ((_val) << HTT_TX_TCL_METADATA_GLBL_SEQ_HTT_EXT_PRESENT_S)); \ } while (0) /*------------------------------------------------------------------ * End V2 Version of TCL Data Command *-----------------------------------------------------------------*/ Loading Loading @@ -5452,6 +5473,7 @@ enum htt_srng_ring_id { HTT_RX_MON_MON2HOST_DEST_RING, /* Used by monitor to fill status buffers and provide to host */ HTT_LPASS_TO_FW_RXBUF_RING, /* new LPASS to FW refill ring to recycle rx buffers */ HTT_HOST3_TO_FW_RXBUF_RING, /* used by host for EasyMesh feature */ HTT_HOST4_TO_FW_RXBUF_RING, /* fourth ring used by host to provide buffers for MGMT packets */ /* Add Other SRING which can't be directly configured by host software above this line */ }; Loading Loading @@ -5790,38 +5812,39 @@ enum htt_srng_ring_id { * * The message would appear as follows: * * |31 28|27|26|25|24|23|22|21 19|18 16|15 | 11| 10|9 8|7 0| * |-----+--+--+--+--+-----------------+----+---+---+---+---------------| * |rsvd1|DT|OV|PS|SS| ring_id | pdev_id | msg_type | * |-----------------------+-----+-----+--------------------------------| * |31 29|28|27|26|25|24|23|22|21 19|18 16|15 | 11| 10|9 8|7 0| * |-----+--+--+--+--+--+-----------------+----+---+---+---+---------------| * |rsvd1|ED|DT|OV|PS|SS| ring_id | pdev_id | msg_type | * |--------------------------+-----+-----+--------------------------------| * | rsvd2 |RX|RXHDL| CLD | CLC | CLM | ring_buffer_size | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_0 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_1 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_2 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | packet_type_enable_flags_3 | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | tlv_filter_in_flags | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_header_offset | rx_packet_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_mpdu_start_offset | rx_mpdu_end_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rx_msdu_start_offset | rx_msdu_end_offset | * |-----------------------------------+--------------------------------| * |--------------------------------------+--------------------------------| * | rsvd3 | rx_attention_offset | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * | rsvd4 | mo| fp| rx_drop_threshold | * | |ndp|ndp| | * |--------------------------------------------------------------------| * |-----------------------------------------------------------------------| * Where: * PS = pkt_swap * SS = status_swap * OV = rx_offsets_valid * DT = drop_thresh_valid * ED = packet type enable data flags fields present / valid * CLM = config_length_mgmt * CLC = config_length_ctrl * CLD = config_length_data Loading @@ -5846,8 +5869,12 @@ enum htt_srng_ring_id { * b'27 - drop_thresh_valid (DT): flag to indicate if the * rx_drop_threshold field is valid * b'28 - rx_mon_global_en: Enable/Disable global register 8 configuration in Rx monitor module. * b'29:31 - rsvd1: reserved for future use * configuration in Rx monitor module. * b'29 - packet_type_enable_data: flag to indicate whether * newer packet_type_enable_data_flags_* are valid or not * If not set, will use pkt_type_enable_flags for both status * and full pkt buffer configuration. * b'30:31 - rsvd1: reserved for future use * dword1 - b'0:15 - ring_buffer_size: size of bufferes referenced by rx ring, * in byte units. * Valid only for HW_TO_SW_RING and SW_TO_HW_RING Loading Loading @@ -6011,6 +6038,32 @@ enum htt_srng_ring_id { * 1: RX_PKT TLV logging at specified offset for the * subsequent buffer * b`15:1 - rx_pkt_tlv_offset: Qword offset for rx_packet TLVs. * dword18- b'0:19 - rx_mpdu_start_wmask_v2 - wmask address for rx mpdu start * b'20-27 - rx_mpdu_end_wmask_v2 - wmask addr for rx mpdu end tlv addr * b'28-31 - reserved * dword19- b'0-19 - rx_msdu_end_wmask_v2 * b'20-31 - reserved * dword20- b'0:19 - rx_ppdu_end_user_stats_wmask_v2 * offset for ppdu_end_user_stats tlv * b'20-31 - reserved * dword21- b'0-31 - packet_type_enable_fpmo_flags_0 - filter bmap for each * mode mgmt/ctrl type/subtype for fpmo mode * dword22- b'0-31 - packet_type_enable_fpmo_flags_1 - filter bmap for each * mode ctrl/data type/subtype for fpmo mode * dword23- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode MGMT type/subtype * dword24- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode MGMT type/subtype * dword25- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode CTRL type/subtype * dword26- b'0-31 - packet_type_enable_data_flags_0 - filter bmap for full * pkt buffer each mode CTRL/DATA type/subtype * dword27- b'0-31 - packet_type_enable_data_fpmo_flags_0 - filter bmap for * full pkt buffer each mode mgmt/ctrl type/subtype for * fpmo mode * dword28- b'0-31 - packet_type_enable_data_fpmo_flags_1 - filter bmap for * full pkt buffer each mode ctrl/data type/subtype for * fpmo mode */ PREPACK struct htt_rx_ring_selection_cfg_t { A_UINT32 msg_type: 8, Loading @@ -6021,7 +6074,8 @@ PREPACK struct htt_rx_ring_selection_cfg_t { rx_offsets_valid: 1, drop_thresh_valid: 1, rx_mon_global_en: 1, rsvd1: 3; packet_type_enable_data: 1, rsvd1: 2; A_UINT32 ring_buffer_size: 16, config_length_mgmt:3, config_length_ctrl:3, Loading Loading @@ -6075,6 +6129,12 @@ PREPACK struct htt_rx_ring_selection_cfg_t { rsvd10: 12; A_UINT32 packet_type_enable_fpmo_flags0; A_UINT32 packet_type_enable_fpmo_flags1; A_UINT32 packet_type_enable_data_flags_0; A_UINT32 packet_type_enable_data_flags_1; A_UINT32 packet_type_enable_data_flags_2; A_UINT32 packet_type_enable_data_flags_3; A_UINT32 packet_type_enable_data_fpmo_flags0; A_UINT32 packet_type_enable_data_fpmo_flags1; } POSTPACK; #define HTT_RX_RING_SELECTION_CFG_SZ (sizeof(struct htt_rx_ring_selection_cfg_t)) Loading Loading @@ -6156,6 +6216,17 @@ PREPACK struct htt_rx_ring_selection_cfg_t { ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_RX_MON_GLOBAL_EN_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_M 0x20000000 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S 29 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_M 0x0000ffff #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_S 0 #define HTT_RX_RING_SELECTION_CFG_RING_BUFFER_SIZE_GET(_var) \ Loading Loading @@ -6644,6 +6715,74 @@ PREPACK struct htt_rx_ring_selection_cfg_t { ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_FPMO_FLAGS1_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_0_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_1_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_2_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_M 0xffffffff #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_M) >> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FLAG_3_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_M 0xFFFFFFFF #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_M)>> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS0_S)); \ } while (0) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_M 0xFFFFFFFF #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S 0 #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_GET(_var) \ (((_var) & HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_M)>> \ HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S) #define HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1, _val); \ ((_var) |= ((_val) << HTT_RX_RING_SELECTION_CFG_PACKET_TYPE_ENABLE_DATA_FPMO_FLAGS1_S)); \ } while (0) /* * Subtype based MGMT frames enable bits. * FP: Filter_Pass, MD: Monitor_Direct MO: Monitor_Other Loading Loading @@ -20609,7 +20748,8 @@ PREPACK struct htt_rx_peer_metadata_v1a { vdev_id: 8, logical_link_id: 4, chip_id: 3, reserved2: 3; qdata_refill: 1, reserved2: 2; } POSTPACK; #define HTT_RX_PEER_META_DATA_V1A_PEER_ID_S 0 Loading Loading @@ -20667,6 +20807,17 @@ PREPACK struct htt_rx_peer_metadata_v1a { ((_var) |= ((_val) << HTT_RX_PEER_META_DATA_V1A_CHIP_ID_S)); \ } while (0) #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S 29 #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_M 0x20000000 #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_GET(_var) \ (((_var) & HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_M) >> HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S) #define HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_SET(_var, _val) \ do { \ HTT_CHECK_SET_VAL(HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL, _val); \ ((_var) |= ((_val) << HTT_RX_PEER_META_DATA_V1A_QDATA_REFILL_S)); \ } while (0) /** * @brief target -> RX PEER METADATA V1B format Loading Loading @@ -20776,6 +20927,9 @@ extern void (*HTT_RX_PEER_META_DATA_CHIP_ID_SET) (A_UINT32 *var, A_UINT32 val); extern A_UINT32 (*HTT_RX_PEER_META_DATA_HW_LINK_ID_GET) (A_UINT32 var); extern void (*HTT_RX_PEER_META_DATA_HW_LINK_ID_SET) (A_UINT32 *var, A_UINT32 val); extern A_UINT32 (*HTT_RX_PEER_META_DATA_QDATA_REFILL_GET) (A_UINT32 var); extern void (*HTT_RX_PEER_META_DATA_QDATA_REFILL_SET) (A_UINT32 *var, A_UINT32 val); /* * In some systems, the host SW wants to specify priorities between Loading Loading @@ -22949,6 +23103,7 @@ typedef enum { HTT_SDWF_MSDUQ_CFG_IND_ERROR_DEACTIVATED_MSDUQ = 0x05, HTT_SDWF_MSDUQ_CFG_IND_ERROR_REACTIVATED_MSDUQ = 0x06, HTT_SDWF_MSDUQ_CFG_IND_ERROR_INVALID_SVC_CLASS = 0x07, HTT_SDWF_MSDUQ_CFG_IND_ERROR_TIDQ_LOCATE_ERROR = 0x08, } HTT_SDWF_MSDUQ_CFG_IND_ERROR_CODE_E; PREPACK struct htt_t2h_sdwf_msduq_cfg_ind {
drivers/staging/fw-api/fw/htt_stats.h +328 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes
drivers/staging/fw-api/fw/wlan_module_ids.h +38 −0 Original line number Diff line number Diff line Loading @@ -155,9 +155,47 @@ typedef enum { WLAN_MODULE_BRIDGE_PEER, /* 0x72 */ WLAN_MODULE_AUX_MAC_MGR, /* 0x73 */ WLAN_MODULE_TCAM, /* 0x74 */ WLAN_MODULE_P2P_R2, /* 0x75 */ WLAN_MODULE_SYSSW, /* 0x76 */ /* HDL MODULE IDS */ WLAN_MODULE_PHYLIB_RXDCOCAL, /* 0x77 */ WLAN_MODULE_PHYLIB_COMBCAL, /* 0x78 */ WLAN_MODULE_PHYLIB_TPCCAL, /* 0x79 */ WLAN_MODULE_PHYLIB_BBFILTCAL, /* 0x7a */ WLAN_MODULE_PHYLIB_PKTDETCAL, /* 0x7b */ WLAN_MODULE_PHYLIB_PAPRDCAL, /* 0x7c */ WLAN_MODULE_PHYLIB_NFCAL, /* 0x7d */ WLAN_MODULE_PHYLIB_ADCCAL, /* 0x7e */ WLAN_MODULE_PHYLIB_DACCAL, /* 0x7f */ WLAN_MODULE_PHYLIB_PALCAL, /* 0x80 */ WLAN_MODULE_PHYLIB_RXGAINCAL, /* 0x81 */ WLAN_MODULE_PHYLIB_CALUTILS, /* 0x82 */ WLAN_MODULE_PHYLIB_PHYRESET, /* 0x83 */ WLAN_MODULE_PHYLIB_RFACONFIG, /* 0x84 */ WLAN_MODULE_PHYLIB_SETCHAINMASK, /* 0x85 */ WLAN_MODULE_PHYLIB_SETXBAR, /* 0x86 */ WLAN_MODULE_PHYLIB_M3, /* 0x87 */ WLAN_MODULE_PHYLIB_COMMON, /* 0x88 */ WLAN_MODULE_PHYLIB_SPURMITT, /* 0x89 */ WLAN_MODULE_PHYLIB_RTT, /* 0x8a */ WLAN_MODULE_PHYLIB_FTPG, /* 0x8b */ WLAN_MODULE_PHYLIB_RSTCAL, /* 0x8c */ WLAN_MODULE_PHYLIB_RXBBFCAL, /* 0x8d */ WLAN_MODULE_PHYLIB_TIADCCAL, /* 0x8e */ WLAN_MODULE_PHYLIB_IM2CAL, /* 0x8f */ WLAN_MODULE_PHYLIB_PACCAL, /* 0x90 */ WLAN_MODULE_PHYLIB_PDCCAL, /* 0x91 */ WLAN_MODULE_PHYLIB_SPURCAL, /* 0x92 */ WLAN_MODULE_PHYLIB_PHYDBG, /* 0x93 */ WLAN_MODULE_PHYLIB_RRI, /* 0x94 */ WLAN_MODULE_PHYLIB_SSCAN, /* 0x95 */ WLAN_MODULE_PHYLIB_RSVD, /* 0x96 */ WLAN_MODULE_ID_MAX, WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX, WLAN_MODULE_ID_ALL = 0xffff /* wildcard to indicate all modules */ } WLAN_MODULE_ID; Loading
drivers/staging/fw-api/fw/wmi_services.h +22 −1 Original line number Diff line number Diff line Loading @@ -656,12 +656,33 @@ typedef enum { WMI_SERVICE_DYNAMIC_WSI_REMAP_SUPPORT = 403, /* WSI bypass remap is supported by Firmware */ WMI_SERVICE_QMS_DLKM_SUPPORT = 404, /* DEPRECATED */ WMI_SERVICE_SMEM_MAILBOX_SUPPORT = 404, /* FW code has smem_mailbox support enabled */ WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* Indicate FW would send EXT2 REG_CC event having data which would be a continuation to EXT REG_CC event */ WMI_SERVICE_REG_CC_EXT2_EVENT_SUPPORT = 405, /* DEPRECATED */ WMI_SERVICE_MLO_MODE2_RECOVERY_SUPPORTED = 406, /* Indicate FW support for MLO mode2 recovery */ WMI_SERVICE_MSDUQ_RECFG = 407, /* FW support the HTT MSDUQ_RECFG_REQ + MSDUQ_CFG_IND messages */ WMI_SERVICE_TRAFFIC_CONTEXT_SUPPORT = 408, /* FW supports traffic context aware manager */ WMI_SERVICE_STA_SAP_NDP_CONCURRENCY_SUPPORT = 409, /* FW supports STA + SAP + NDP concurrency */ WMI_SERVICE_THERM_THROT_POUT_REDUCTION = 410, /* FW supports thermal throttling Pout reduction */ WMI_SERVICE_E2E_SDWF_SUPPORT = 411, /* FW supports end-to-end SDWF features like SDWF scheduler */ WMI_SERVICE_EPM = 412, /* FW supports enhanced power management */ WMI_SERVICE_CHIPSET_LOGGING_SUPPORT = 413, /* FW supports chipset logging feature */ WMI_SERVICE_SUPPORT_AP_SUSPEND_RESUME = 414, /* FW supports SAP suspend feature */ WMI_SERVICE_STA_P2P_NDP_CONCURRENCY_SUPPORT = 415, /* FW supports STA + P2P + NAN concurrency */ WMI_SERVICE_USE_STA_VDEV_FOR_P2P_DEVICE = 416, /* FW supports use of sta vdev to be repurposed for p2p device */ WMI_SERVICE_AP_ASSISTED_DFS_CHAN_P2P_SESSION = 417, /* FW supports P2P session on DFS chan enabled by DFS master AP */ WMI_SERVICE_MLO_SAP_EMLSR_SUPPORT = 418, /* Indicates FW MLO SAP supports EMLSR Mode */ WMI_SERVICE_PKTLOG_ML_TSTMP_SUPPORT = 419, /* Indicates ML timestamp for pktlog */ WMI_SERVICE_MGMT_SRNG_SUPPORT = 420, /* FW supports MGMT frame forwarding via host provided SRNG instead of WMI */ WMI_SERVICE_WDS_NULL_FRAME_SUPPORT = 421, WMI_SERVICE_MLO_SAP_CONCURRENCY_SUPPORT = 422, /* Indicates FW supports MLO SAP+STA Concurrency */ WMI_SERVICE_MEC_AGING_TIMER_SUPPORT = 423, /* FW supports multicast echo check aging timer */ WMI_SERVICE_MULTI_RSNO_SUPPORT = 424, /* FW supports parsing of multiple RSN override IEs */ /* WMI_SERVICE_IS_TARGET_IPA: * FW indicates to host whether the target is IPA or xFEM. * If this flag is 0, the target is XFEM or unspecified. * If this flag is 1, the target is IPA. */ WMI_SERVICE_IS_TARGET_IPA = 425, WMI_SERVICE_THERM_THROT_TX_CHAIN_MASK = 426, /*FW supports thermal throttling dynamic Tx ChainMask update */ WMI_MAX_EXT2_SERVICE Loading