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Commit 28fa9917 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-fixes-4.8-2' of...

Merge tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

i.MX fixes for 4.8, 2nd round:
 - Fix misspelled "ti,x-plate-ohms" property name of touchscreen
   controller for imx7d-sdb DTS.
 - Add missing BM_CLPCR_BYPASS_PMIC_READY setting for i.MX6SX to get
   suspend/resume work properly.
 - Fix SPDIF regression on imx6qdl which caused by a clock update on
   spdif device node.

* tag 'imx-fixes-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  ARM: dts: imx6qdl: Fix SPDIF regression
  ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
  ARM: dts: imx7d-sdb: fix ti,x-plate-ohms property name

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d8b795f5 f065e9e4
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+1 −1
Original line number Diff line number Diff line
@@ -243,7 +243,7 @@
					clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
						 <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
						 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
						 <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,
						 <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>,
						 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
					clock-names = "core",  "rxtx0",
						      "rxtx1", "rxtx2",
+1 −1
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@
		ti,y-min = /bits/ 16 <0>;
		ti,y-max = /bits/ 16 <0>;
		ti,pressure-max = /bits/ 16 <0>;
		ti,x-plat-ohms = /bits/ 16 <400>;
		ti,x-plate-ohms = /bits/ 16 <400>;
		wakeup-source;
	};
};
+1 −1
Original line number Diff line number Diff line
@@ -310,7 +310,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
		val |= 0x3 << BP_CLPCR_STBY_COUNT;
		val |= BM_CLPCR_VSTBY;
		val |= BM_CLPCR_SBYOS;
		if (cpu_is_imx6sl())
		if (cpu_is_imx6sl() || cpu_is_imx6sx())
			val |= BM_CLPCR_BYPASS_PMIC_READY;
		if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
			val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;