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Commit 28f69154 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

Merge branch 'for-joerg/io-pgtable' of... 

Merge branch 'for-joerg/io-pgtable' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/io-pgtable
parents 81f70ba2 c8bff3a6

MAINTAINERS

+2 −0
Original line number Diff line number Diff line
@@ -1793,11 +1793,13 @@ F: drivers/edac/synopsys_edac.c 


ARM SMMU DRIVERS

M:	Will Deacon <will.deacon@arm.com>

R:	Robin Murphy <robin.murphy@arm.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

S:	Maintained

F:	drivers/iommu/arm-smmu.c

F:	drivers/iommu/arm-smmu-v3.c

F:	drivers/iommu/io-pgtable-arm.c

F:	drivers/iommu/io-pgtable-arm-v7s.c



ARM64 PORT (AARCH64 ARCHITECTURE)

M:	Catalin Marinas <catalin.marinas@arm.com>

drivers/iommu/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -39,6 +39,25 @@ config IOMMU_IO_PGTABLE_LPAE_SELFTEST 


	  If unsure, say N here.



config IOMMU_IO_PGTABLE_ARMV7S

	bool "ARMv7/v8 Short Descriptor Format"

	select IOMMU_IO_PGTABLE

	depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST)

	help

	  Enable support for the ARM Short-descriptor pagetable format.

	  This supports 32-bit virtual and physical addresses mapped using

	  2-level tables with 4KB pages/1MB sections, and contiguous entries

	  for 64KB pages/16MB supersections if indicated by the IOMMU driver.



config IOMMU_IO_PGTABLE_ARMV7S_SELFTEST

	bool "ARMv7s selftests"

	depends on IOMMU_IO_PGTABLE_ARMV7S

	help

	  Enable self-tests for ARMv7s page table allocator. This performs

	  a series of page-table consistency checks during boot.



	  If unsure, say N here.



endmenu



config IOMMU_IOVA

drivers/iommu/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ obj-$(CONFIG_IOMMU_API) += iommu-traces.o 
obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o

obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o

obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o

obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) += io-pgtable-arm-v7s.o

obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o

obj-$(CONFIG_IOMMU_IOVA) += iova.o

obj-$(CONFIG_OF_IOMMU)	+= of_iommu.o

drivers/iommu/io-pgtable-arm-v7s.c

0 → 100644
+846 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/iommu/io-pgtable-arm.c

+20 −14
Original line number Diff line number Diff line
@@ -446,7 +446,6 @@ static int arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, 
	unsigned long blk_start, blk_end;

	phys_addr_t blk_paddr;

	arm_lpae_iopte table = 0;

	struct io_pgtable_cfg *cfg = &data->iop.cfg;



	blk_start = iova & ~(blk_size - 1);

	blk_end = blk_start + blk_size;
@@ -472,9 +471,9 @@ static int arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, 
		}

	}



	__arm_lpae_set_pte(ptep, table, cfg);

	__arm_lpae_set_pte(ptep, table, &data->iop.cfg);

	iova &= ~(blk_size - 1);

	cfg->tlb->tlb_add_flush(iova, blk_size, blk_size, true, data->iop.cookie);

	io_pgtable_tlb_add_flush(&data->iop, iova, blk_size, blk_size, true);

	return size;

}
@@ -483,8 +482,7 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, 
			    arm_lpae_iopte *ptep)

{

	arm_lpae_iopte pte;

	const struct iommu_gather_ops *tlb = data->iop.cfg.tlb;

	void *cookie = data->iop.cookie;

	struct io_pgtable *iop = &data->iop;

	size_t blk_size = ARM_LPAE_BLOCK_SIZE(lvl, data);



	/* Something went horribly wrong and we ran out of page table */
@@ -498,17 +496,17 @@ static int __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, 


	/* If the size matches this level, we're in the right place */

	if (size == blk_size) {

		__arm_lpae_set_pte(ptep, 0, &data->iop.cfg);

		__arm_lpae_set_pte(ptep, 0, &iop->cfg);



		if (!iopte_leaf(pte, lvl)) {

			/* Also flush any partial walks */

			tlb->tlb_add_flush(iova, size, ARM_LPAE_GRANULE(data),

					   false, cookie);

			tlb->tlb_sync(cookie);

			io_pgtable_tlb_add_flush(iop, iova, size,

						ARM_LPAE_GRANULE(data), false);

			io_pgtable_tlb_sync(iop);

			ptep = iopte_deref(pte, data);

			__arm_lpae_free_pgtable(data, lvl + 1, ptep);

		} else {

			tlb->tlb_add_flush(iova, size, size, true, cookie);

			io_pgtable_tlb_add_flush(iop, iova, size, size, true);

		}



		return size;
@@ -532,13 +530,12 @@ static int arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova, 
{

	size_t unmapped;

	struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops);

	struct io_pgtable *iop = &data->iop;

	arm_lpae_iopte *ptep = data->pgd;

	int lvl = ARM_LPAE_START_LVL(data);



	unmapped = __arm_lpae_unmap(data, iova, size, lvl, ptep);

	if (unmapped)

		iop->cfg.tlb->tlb_sync(iop->cookie);

		io_pgtable_tlb_sync(&data->iop);



	return unmapped;

}
@@ -662,8 +659,12 @@ static struct io_pgtable * 
arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie)

{

	u64 reg;

	struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg);

	struct arm_lpae_io_pgtable *data;



	if (cfg->quirks & ~IO_PGTABLE_QUIRK_ARM_NS)

		return NULL;



	data = arm_lpae_alloc_pgtable(cfg);

	if (!data)

		return NULL;
@@ -746,8 +747,13 @@ static struct io_pgtable * 
arm_64_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie)

{

	u64 reg, sl;

	struct arm_lpae_io_pgtable *data = arm_lpae_alloc_pgtable(cfg);

	struct arm_lpae_io_pgtable *data;



	/* The NS quirk doesn't apply at stage 2 */

	if (cfg->quirks)

		return NULL;



	data = arm_lpae_alloc_pgtable(cfg);

	if (!data)

		return NULL;