Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 28d41754 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: fix dcn1 dppclk when min dispclk patch applies



Applying min dispclk patch would result in incorrect dppclk divider
without this change

Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1296423b
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -998,7 +998,7 @@ bool dcn_validate_bandwidth(
					dc->debug.min_disp_clk_khz;
		}

		context->bw.dcn.calc_clk.max_dppclk_khz = (int)(v->dppclk * 1000);
		context->bw.dcn.calc_clk.max_dppclk_khz = context->bw.dcn.calc_clk.dispclk_khz / v->dispclk_dppclk_ratio;

		for (i = 0, input_idx = 0; i < pool->pipe_count; i++) {
			struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];