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Commit 2730fa0d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

- fix missing crtc unlock in MC setup
- set optimal CE ram config
- use gart rather than vram for DMA IB tests to avoid coherency issues with HDP
- fix a crasher with laptop mode and TDP scripts

* 'drm-fixes-3.18' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: add missing crtc unlock when setting up the MC
  drm/radeon: use gart for DMA IB tests
  drm/radeon: make sure mode init is complete in bandwidth_update
  drm/radeon: set correct CE ram size for CIK
parents ed78bb84 f0d7bfb9

drivers/gpu/drm/radeon/cik.c

+5 −2
Original line number Diff line number Diff line
@@ -4313,8 +4313,8 @@ static int cik_cp_gfx_start(struct radeon_device *rdev) 
	/* init the CE partitions.  CE only used for gfx on CIK */

	radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

	radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

	radeon_ring_write(ring, 0xc000);

	radeon_ring_write(ring, 0xc000);

	radeon_ring_write(ring, 0x8000);

	radeon_ring_write(ring, 0x8000);



	/* setup clear context state */

	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));
@@ -9447,6 +9447,9 @@ void dce8_bandwidth_update(struct radeon_device *rdev) 
	u32 num_heads = 0, lb_size;

	int i;



	if (!rdev->mode_info.mode_config_initialized)

		return;



	radeon_update_display_priority(rdev);



	for (i = 0; i < rdev->num_crtc; i++) {

drivers/gpu/drm/radeon/cik_sdma.c

+12 −9
Original line number Diff line number Diff line
@@ -667,17 +667,20 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
{

	struct radeon_ib ib;

	unsigned i;

	unsigned index;

	int r;

	void __iomem *ptr = (void *)rdev->vram_scratch.ptr;

	u32 tmp = 0;

	u64 gpu_addr;



	if (!ptr) {

		DRM_ERROR("invalid vram scratch pointer\n");

		return -EINVAL;

	}

	if (ring->idx == R600_RING_TYPE_DMA_INDEX)

		index = R600_WB_DMA_RING_TEST_OFFSET;

	else

		index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;



	gpu_addr = rdev->wb.gpu_addr + index;



	tmp = 0xCAFEDEAD;

	writel(tmp, ptr);

	rdev->wb.wb[index/4] = cpu_to_le32(tmp);



	r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);

	if (r) {
@@ -686,8 +689,8 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
	}



	ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0);

	ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc;

	ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr);

	ib.ptr[1] = lower_32_bits(gpu_addr);

	ib.ptr[2] = upper_32_bits(gpu_addr);

	ib.ptr[3] = 1;

	ib.ptr[4] = 0xDEADBEEF;

	ib.length_dw = 5;
@@ -704,7 +707,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
		return r;

	}

	for (i = 0; i < rdev->usec_timeout; i++) {

		tmp = readl(ptr);

		tmp = le32_to_cpu(rdev->wb.wb[index/4]);

		if (tmp == 0xDEADBEEF)

			break;

		DRM_UDELAY(1);

drivers/gpu/drm/radeon/evergreen.c

+4 −0
Original line number Diff line number Diff line
@@ -2345,6 +2345,9 @@ void evergreen_bandwidth_update(struct radeon_device *rdev) 
	u32 num_heads = 0, lb_size;

	int i;



	if (!rdev->mode_info.mode_config_initialized)

		return;



	radeon_update_display_priority(rdev);



	for (i = 0; i < rdev->num_crtc; i++) {
@@ -2552,6 +2555,7 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav 
					WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

					tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;

					WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);

					WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

				}

			} else {

				tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/radeon/r100.c

+3 −0
Original line number Diff line number Diff line
@@ -3207,6 +3207,9 @@ void r100_bandwidth_update(struct radeon_device *rdev) 
	uint32_t pixel_bytes1 = 0;

	uint32_t pixel_bytes2 = 0;



	if (!rdev->mode_info.mode_config_initialized)

		return;



	radeon_update_display_priority(rdev);



	if (rdev->mode_info.crtcs[0]->base.enabled) {

drivers/gpu/drm/radeon/r600_dma.c

+10 −10
Original line number Diff line number Diff line
@@ -338,17 +338,17 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
{

	struct radeon_ib ib;

	unsigned i;

	unsigned index;

	int r;

	void __iomem *ptr = (void *)rdev->vram_scratch.ptr;

	u32 tmp = 0;

	u64 gpu_addr;



	if (!ptr) {

		DRM_ERROR("invalid vram scratch pointer\n");

		return -EINVAL;

	}

	if (ring->idx == R600_RING_TYPE_DMA_INDEX)

		index = R600_WB_DMA_RING_TEST_OFFSET;

	else

		index = CAYMAN_WB_DMA1_RING_TEST_OFFSET;



	tmp = 0xCAFEDEAD;

	writel(tmp, ptr);

	gpu_addr = rdev->wb.gpu_addr + index;



	r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);

	if (r) {
@@ -357,8 +357,8 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
	}



	ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1);

	ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc;

	ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff;

	ib.ptr[1] = lower_32_bits(gpu_addr);

	ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff;

	ib.ptr[3] = 0xDEADBEEF;

	ib.length_dw = 4;
@@ -374,7 +374,7 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) 
		return r;

	}

	for (i = 0; i < rdev->usec_timeout; i++) {

		tmp = readl(ptr);

		tmp = le32_to_cpu(rdev->wb.wb[index/4]);

		if (tmp == 0xDEADBEEF)

			break;

		DRM_UDELAY(1);