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Commit 26ea5801 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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ARM: dts: imx6q: update setting of VDDARM_CAP voltage



According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of i.MX6Q boards' VDD_CACHE_CAP currently
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage.

Signed-off-by: default avatarAnson Huang <b20788@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent da474d4c
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+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@
				1200000 1275000
				996000  1250000
				792000  1150000
				396000  950000
				396000  975000
			>;
			clock-latency = <61036>; /* two CLK32 periods */
			clocks = <&clks 104>, <&clks 6>, <&clks 16>,