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Commit 26a8eb59 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'versatile-flash-for-arm-soc' of... 

Merge tag 'versatile-flash-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers

Merge "move Versatile flash protection to the device tree" from Linus Walleij:

This is a set of patches removing the board file code
for Versatile flash handling and instead moving it over
to the device tree and a special add-on file.

* tag 'versatile-flash-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator

:
  ARM: integrator: move flash registration to device tree
  ARM: versatile: move flash registration to the device tree
  mtd: augment the "arm,versatile-flash" bindings
  mtd: physmap_of: add a hook for Versatile write protection

Acked-by: default avatarBrian Norris <computersforpeace@gmail.com>
parents a961bf24 91011a76

Documentation/devicetree/bindings/mtd/arm-versatile.txt

+19 −1
Original line number Diff line number Diff line 
Flash device on ARM Versatile board



These flash chips are found in the ARM reference designs like Integrator,

Versatile, RealView, Versatile Express etc.



They are regular CFI compatible (Intel or AMD extended) flash chips with

some special write protect/VPP bits that can be controlled by the machine's

system controller.



Required properties:

- compatible : must be "arm,versatile-flash";

- compatible : must be "arm,versatile-flash", "cfi-flash";

- reg : memory address for the flash chip

- bank-width : width in bytes of flash interface.



For the rest of the properties, see mtd-physmap.txt.



The device tree may optionally contain sub-nodes describing partitions of the

address space. See partition.txt for more detail.



Example:



flash@34000000 {

	compatible = "arm,versatile-flash", "cfi-flash";

	reg = <0x34000000 0x4000000>;

	bank-width = <4>;

};

arch/arm/boot/dts/integrator.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -52,8 +52,9 @@ 
	};



	flash@24000000 {

		compatible = "cfi-flash";

		compatible = "arm,versatile-flash", "cfi-flash";

		reg = <0x24000000 0x02000000>;

		bank-width = <4>;

	};



	fpga {

arch/arm/boot/dts/versatile-ab.dts

+3 −2
Original line number Diff line number Diff line
@@ -119,8 +119,9 @@ 
	};



	flash@34000000 {

		compatible = "arm,versatile-flash";

		reg = <0x34000000 0x4000000>;

		/* 64 MiB NOR flash in non-interleaved chips */

		compatible = "arm,versatile-flash", "cfi-flash";

		reg = <0x34000000 0x04000000>;

		bank-width = <4>;

	};

arch/arm/mach-integrator/integrator_ap.c

+0 −62
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ 
#include <linux/amba/kmi.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/mtd/physmap.h>

#include <linux/platform_data/clk-integrator.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>
@@ -146,65 +145,6 @@ static int __init irq_syscore_init(void) 


device_initcall(irq_syscore_init);



/*

 * Flash handling.

 */

static int ap_flash_init(struct platform_device *dev)

{

	u32 tmp;



	writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,

	       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);



	tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) |

		INTEGRATOR_EBI_WRITE_ENABLE;

	writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);



	if (!(readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET)

	      & INTEGRATOR_EBI_WRITE_ENABLE)) {

		writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);

		writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);

		writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);

	}

	return 0;

}



static void ap_flash_exit(struct platform_device *dev)

{

	u32 tmp;



	writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,

	       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);



	tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) &

		~INTEGRATOR_EBI_WRITE_ENABLE;

	writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);



	if (readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) &

	    INTEGRATOR_EBI_WRITE_ENABLE) {

		writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);

		writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);

		writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);

	}

}



static void ap_flash_set_vpp(struct platform_device *pdev, int on)

{

	if (on)

		writel(INTEGRATOR_SC_CTRL_nFLVPPEN,

		       ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);

	else

		writel(INTEGRATOR_SC_CTRL_nFLVPPEN,

		       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);

}



static struct physmap_flash_data ap_flash_data = {

	.width		= 4,

	.init		= ap_flash_init,

	.exit		= ap_flash_exit,

	.set_vpp	= ap_flash_set_vpp,

};



/*

 * For the PL010 found in the Integrator/AP some of the UART control is

 * implemented in the system controller and accessed using a callback
@@ -266,8 +206,6 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { 
		"kmi0", NULL),

	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,

		"kmi1", NULL),

	OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE,

		"physmap-flash", &ap_flash_data),

	{ /* sentinel */ },

};

arch/arm/mach-integrator/integrator_cp.c

+0 −51
Original line number Diff line number Diff line
@@ -23,7 +23,6 @@ 
#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/gfp.h>

#include <linux/mtd/physmap.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>
@@ -43,14 +42,8 @@ 
/* Base address to the CP controller */

static void __iomem *intcp_con_base;



#define INTCP_PA_FLASH_BASE		0x24000000



#define INTCP_PA_CLCD_BASE		0xc0000000



#define INTCP_FLASHPROG			0x04

#define CINTEGRATOR_FLASHPROG_FLVPPEN	(1 << 0)

#define CINTEGRATOR_FLASHPROG_FLWREN	(1 << 1)



/*

 * Logical      Physical

 * f1000000	10000000	Core module registers
@@ -107,48 +100,6 @@ static void __init intcp_map_io(void) 
	iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));

}



/*

 * Flash handling.

 */

static int intcp_flash_init(struct platform_device *dev)

{

	u32 val;



	val = readl(intcp_con_base + INTCP_FLASHPROG);

	val |= CINTEGRATOR_FLASHPROG_FLWREN;

	writel(val, intcp_con_base + INTCP_FLASHPROG);



	return 0;

}



static void intcp_flash_exit(struct platform_device *dev)

{

	u32 val;



	val = readl(intcp_con_base + INTCP_FLASHPROG);

	val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);

	writel(val, intcp_con_base + INTCP_FLASHPROG);

}



static void intcp_flash_set_vpp(struct platform_device *pdev, int on)

{

	u32 val;



	val = readl(intcp_con_base + INTCP_FLASHPROG);

	if (on)

		val |= CINTEGRATOR_FLASHPROG_FLVPPEN;

	else

		val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;

	writel(val, intcp_con_base + INTCP_FLASHPROG);

}



static struct physmap_flash_data intcp_flash_data = {

	.width		= 4,

	.init		= intcp_flash_init,

	.exit		= intcp_flash_exit,

	.set_vpp	= intcp_flash_set_vpp,

};



/*

 * It seems that the card insertion interrupt remains active after

 * we've acknowledged it.  We therefore ignore the interrupt, and
@@ -260,8 +211,6 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { 
		"aaci", &mmc_data),

	OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,

		"clcd", &clcd_data),

	OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE,

		"physmap-flash", &intcp_flash_data),

	{ /* sentinel */ },

};