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Commit 266c73b7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 

Pull drm updates from Dave Airlie:
 "This is the main drm pull request for 4.6 kernel.

  Overall the coolest thing here for me is the nouveau maxwell signed
  firmware support from NVidia, it's taken a long while to extract this
  from them.

  I also wish the ARM vendors just designed one set of display IP, ARM
  display block proliferation is definitely increasing.

  Core:
     - drm_event cleanups
     - Internal API cleanup making mode_fixup optional.
     - Apple GMUX vga switcheroo support.
     - DP AUX testing interface

  Panel:
     - Refactoring of DSI core for use over more transports.

  New driver:
     - ARM hdlcd driver

  i915:
     - FBC/PSR (framebuffer compression, panel self refresh) enabled by default.
     - Ongoing atomic display support work
     - Ongoing runtime PM work
     - Pixel clock limit checks
     - VBT DSI description support
     - GEM fixes
     - GuC firmware scheduler enhancements

  amdkfd:
     - Deferred probing fixes to avoid make file or link ordering.

  amdgpu/radeon:
     - ACP support for i2s audio support.
     - Command Submission/GPU scheduler/GPUVM optimisations
     - Initial GPU reset support for amdgpu

  vmwgfx:
     - Support for DX10 gen mipmaps
     - Pageflipping and other fixes.

  exynos:
     - Exynos5420 SoC support for FIMD
     - Exynos5422 SoC support for MIPI-DSI

  nouveau:
     - GM20x secure boot support - adds acceleration for Maxwell GPUs.
     - GM200 support
     - GM20B clock driver support
     - Power sensors work

  etnaviv:
     - Correctness fixes for GPU cache flushing
     - Better support for i.MX6 systems.

  imx-drm:
     - VBlank IRQ support
     - Fence support
     - OF endpoint support

  msm:
     - HDMI support for 8996 (snapdragon 820)
     - Adreno 430 support
     - Timestamp queries support

  virtio-gpu:
     - Fixes for Android support.

  rockchip:
     - Add support for Innosilicion HDMI

  rcar-du:
     - Support for 4 crtcs
     - R8A7795 support
     - RCar Gen 3 support

  omapdrm:
     - HDMI interlace output support
     - dma-buf import support
     - Refactoring to remove a lot of legacy code.

  tilcdc:
     - Rewrite of pageflipping code
     - dma-buf support
     - pinctrl support

  vc4:
     - HDMI modesetting bug fixes
     - Significant 3D performance improvement.

  fsl-dcu (FreeScale):
     - Lots of fixes

  tegra:
     - Two small fixes

  sti:
     - Atomic support for planes
     - Improved HDMI support"

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1063 commits)
  drm/amdgpu: release_pages requires linux/pagemap.h
  drm/sti: restore mode_fixup callback
  drm/amdgpu/gfx7: add MTYPE definition
  drm/amdgpu: removing BO_VAs shouldn't be interruptible
  drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
  drm/amd/powerplay: show uvd/vce power gate info for fiji
  drm/amdgpu: use sched fence if possible
  drm/amdgpu: move ib.fence to job.fence
  drm/amdgpu: give a fence param to ib_free
  drm/amdgpu: include the right version of gmc header files for iceland
  drm/radeon: fix indentation.
  drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
  drm/amdgpu: switch back to 32bit hw fences v2
  drm/amdgpu: remove amdgpu_fence_is_signaled
  drm/amdgpu: drop the extra fence range check v2
  drm/amdgpu: signal fences directly in amdgpu_fence_process
  drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
  drm/amdgpu: keep all fences in an RCU protected array v2
  drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
  drm/amdgpu: RCU protected amd_sched_fence_release
  ...
parents 2c856e14 568d7c76

Documentation/DocBook/gpu.tmpl

+70 −48
Original line number Diff line number Diff line
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev) 
	<td valign="top" >Description/Restrictions</td>

	</tr>

	<tr>

	<td rowspan="37" valign="top" >DRM</td>

	<td rowspan="42" valign="top" >DRM</td>

	<td valign="top" >Generic</td>

	<td valign="top" >“rotation”</td>

	<td valign="top" >BITMASK</td>
@@ -2068,7 +2068,7 @@ void intel_crt_init(struct drm_device *dev) 
	<td valign="top" >property to suggest an Y offset for a connector</td>

	</tr>

	<tr>

	<td rowspan="3" valign="top" >Optional</td>

	<td rowspan="8" valign="top" >Optional</td>

	<td valign="top" >“scaling mode”</td>

	<td valign="top" >ENUM</td>

	<td valign="top" >{ "None", "Full", "Center", "Full aspect" }</td>
@@ -2092,6 +2092,61 @@ void intel_crt_init(struct drm_device *dev) 
	<td valign="top" >TBD</td>

	</tr>

	<tr>

	<td valign="top" >“DEGAMMA_LUT”</td>

	<td valign="top" >BLOB</td>

	<td valign="top" >0</td>

	<td valign="top" >CRTC</td>

	<td valign="top" >DRM property to set the degamma lookup table

		(LUT) mapping pixel data from the framebuffer before it is

		given to the transformation matrix. The data is an interpreted

		as an array of struct drm_color_lut elements. Hardware might

		choose not to use the full precision of the LUT elements nor

		use all the elements of the LUT (for example the hardware

		might choose to interpolate between LUT[0] and LUT[4]). </td>

	</tr>

	<tr>

	<td valign="top" >“DEGAMMA_LUT_SIZE”</td>

	<td valign="top" >RANGE | IMMUTABLE</td>

	<td valign="top" >Min=0, Max=UINT_MAX</td>

	<td valign="top" >CRTC</td>

	<td valign="top" >DRM property to gives the size of the lookup

		table to be set on the DEGAMMA_LUT property (the size depends

		on the underlying hardware).</td>

	</tr>

	<tr>

	<td valign="top" >“CTM”</td>

	<td valign="top" >BLOB</td>

	<td valign="top" >0</td>

	<td valign="top" >CRTC</td>

	<td valign="top" >DRM property to set the current

		transformation matrix (CTM) apply to pixel data after the

		lookup through the degamma LUT and before the lookup through

		the gamma LUT. The data is an interpreted as a struct

		drm_color_ctm.</td>

	</tr>

	<tr>

	<td valign="top" >“GAMMA_LUT”</td>

	<td valign="top" >BLOB</td>

	<td valign="top" >0</td>

	<td valign="top" >CRTC</td>

	<td valign="top" >DRM property to set the gamma lookup table

		(LUT) mapping pixel data after to the transformation matrix to

		data sent to the connector. The data is an interpreted as an

		array of struct drm_color_lut elements. Hardware might choose

		not to use the full precision of the LUT elements nor use all

		the elements of the LUT (for example the hardware might choose

		to interpolate between LUT[0] and LUT[4]).</td>

	</tr>

	<tr>

	<td valign="top" >“GAMMA_LUT_SIZE”</td>

	<td valign="top" >RANGE | IMMUTABLE</td>

	<td valign="top" >Min=0, Max=UINT_MAX</td>

	<td valign="top" >CRTC</td>

	<td valign="top" >DRM property to gives the size of the lookup

		table to be set on the GAMMA_LUT property (the size depends on

		the underlying hardware).</td>

	</tr>

	<tr>

	<td rowspan="20" valign="top" >i915</td>

	<td rowspan="2" valign="top" >Generic</td>

	<td valign="top" >"Broadcast RGB"</td>
@@ -2886,52 +2941,8 @@ void (*postclose) (struct drm_device *, struct drm_file *);</synopsis> 
    </sect2>

    <sect2>

      <title>File Operations</title>

      <synopsis>const struct file_operations *fops</synopsis>

      <abstract>File operations for the DRM device node.</abstract>

      <para>

        Drivers must define the file operations structure that forms the DRM

	userspace API entry point, even though most of those operations are

	implemented in the DRM core. The <methodname>open</methodname>,

	<methodname>release</methodname> and <methodname>ioctl</methodname>

	operations are handled by

	<programlisting>

	.owner = THIS_MODULE,

	.open = drm_open,

	.release = drm_release,

	.unlocked_ioctl = drm_ioctl,

  #ifdef CONFIG_COMPAT

	.compat_ioctl = drm_compat_ioctl,

  #endif

        </programlisting>

      </para>

      <para>

        Drivers that implement private ioctls that requires 32/64bit

	compatibility support must provide their own

	<methodname>compat_ioctl</methodname> handler that processes private

	ioctls and calls <function>drm_compat_ioctl</function> for core ioctls.

      </para>

      <para>

        The <methodname>read</methodname> and <methodname>poll</methodname>

	operations provide support for reading DRM events and polling them. They

	are implemented by

	<programlisting>

	.poll = drm_poll,

	.read = drm_read,

	.llseek = no_llseek,

	</programlisting>

      </para>

      <para>

        The memory mapping implementation varies depending on how the driver

	manages memory. Pre-GEM drivers will use <function>drm_mmap</function>,

	while GEM-aware drivers will use <function>drm_gem_mmap</function>. See

	<xref linkend="drm-gem"/>.

	<programlisting>

	.mmap = drm_gem_mmap,

	</programlisting>

      </para>

      <para>

        No other file operation is supported by the DRM API.

      </para>

!Pdrivers/gpu/drm/drm_fops.c file operations

!Edrivers/gpu/drm/drm_fops.c

    </sect2>

    <sect2>

      <title>IOCTLs</title>
@@ -3319,6 +3330,12 @@ int num_ioctls;</synopsis> 
!Pdrivers/gpu/drm/i915/intel_csr.c csr support for dmc

!Idrivers/gpu/drm/i915/intel_csr.c

      </sect2>

      <sect2>

	<title>Video BIOS Table (VBT)</title>

!Pdrivers/gpu/drm/i915/intel_bios.c Video BIOS Table (VBT)

!Idrivers/gpu/drm/i915/intel_bios.c

!Idrivers/gpu/drm/i915/intel_bios.h

      </sect2>

    </sect1>



    <sect1>
@@ -3460,6 +3477,7 @@ int num_ioctls;</synopsis> 
    </sect1>

    <sect1>

      <title>Public constants</title>

!Finclude/linux/vga_switcheroo.h vga_switcheroo_handler_flags_t

!Finclude/linux/vga_switcheroo.h vga_switcheroo_client_id

!Finclude/linux/vga_switcheroo.h vga_switcheroo_state

    </sect1>
@@ -3488,6 +3506,10 @@ int num_ioctls;</synopsis> 
        <title>Backlight control</title>

!Pdrivers/platform/x86/apple-gmux.c Backlight control

      </sect2>

      <sect2>

        <title>Public functions</title>

!Iinclude/linux/apple-gmux.h

      </sect2>

    </sect1>

  </chapter>

Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt

+12 −0
Original line number Diff line number Diff line
@@ -35,6 +35,12 @@ Optional properties for HDMI: 
		  as an interrupt/status bit in the HDMI controller

		  itself).  See bindings/pinctrl/brcm,bcm2835-gpio.txt



Required properties for V3D:

- compatible:	Should be "brcm,bcm2835-v3d"

- reg:		Physical base address and length of the V3D's registers

- interrupts:	The interrupt number

		  See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt



Example:

pixelvalve@7e807000 {

	compatible = "brcm,bcm2835-pixelvalve2";
@@ -60,6 +66,12 @@ hdmi: hdmi@7e902000 { 
	clock-names = "pixel", "hdmi";

};



v3d: v3d@7ec00000 {

	compatible = "brcm,bcm2835-v3d";

	reg = <0x7ec00000 0x1000>;

	interrupts = <1 10>;

};



vc4: gpu {

	compatible = "brcm,bcm2835-vc4";

};

Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ Required properties: 
		"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */

		"samsung,exynos4415-mipi-dsi" /* for Exynos4415 SoC */

		"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */

		"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */

		"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */

  - reg: physical base address and length of the registers set for the device

  - interrupts: should contain DSI interrupt

Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt

+2 −1
Original line number Diff line number Diff line
@@ -12,7 +12,8 @@ Required properties: 
		"samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */

		"samsung,exynos4210-fimd"; /* for Exynos4 SoCs */

		"samsung,exynos4415-fimd"; /* for Exynos4415 SoC */

		"samsung,exynos5250-fimd"; /* for Exynos5 SoCs */

		"samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */

		"samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */



- reg: physical base address and length of the FIMD registers set.

Documentation/devicetree/bindings/display/msm/dsi.txt

+29 −3
Original line number Diff line number Diff line
@@ -44,9 +44,34 @@ Optional properties: 
- pinctrl-names: the pin control state names; should contain "default"

- pinctrl-0: the default pinctrl state (active)

- pinctrl-n: the "sleep" pinctrl state

- port: DSI controller output port. This contains one endpoint subnode, with its

  remote-endpoint set to the phandle of the connected panel's endpoint.

- port: DSI controller output port, containing one endpoint subnode.



  DSI Endpoint properties:

  - remote-endpoint: set to phandle of the connected panel's endpoint.

    See Documentation/devicetree/bindings/graph.txt for device graph info.

  - qcom,data-lane-map: this describes how the logical DSI lanes are mapped

    to the physical lanes on the given platform. The value contained in

    index n describes what logical data lane is mapped to the physical data

    lane n (DATAn, where n lies between 0 and 3).



    For example:



    qcom,data-lane-map = <3 0 1 2>;



    The above mapping describes that the logical data lane DATA3 is mapped to

    the physical data lane DATA0, logical DATA0 to physical DATA1, logic DATA1

    to phys DATA2 and logic DATA2 to phys DATA3.



    There are only a limited number of physical to logical mappings possible:



    "0123": Logic 0->Phys 0; Logic 1->Phys 1; Logic 2->Phys 2; Logic 3->Phys 3;

    "3012": Logic 3->Phys 0; Logic 0->Phys 1; Logic 1->Phys 2; Logic 2->Phys 3;

    "2301": Logic 2->Phys 0; Logic 3->Phys 1; Logic 0->Phys 2; Logic 1->Phys 3;

    "1230": Logic 1->Phys 0; Logic 2->Phys 1; Logic 3->Phys 2; Logic 0->Phys 3;

    "0321": Logic 0->Phys 0; Logic 3->Phys 1; Logic 2->Phys 2; Logic 1->Phys 3;

    "1032": Logic 1->Phys 0; Logic 0->Phys 1; Logic 3->Phys 2; Logic 2->Phys 3;

    "2103": Logic 2->Phys 0; Logic 1->Phys 1; Logic 0->Phys 2; Logic 3->Phys 3;

    "3210": Logic 3->Phys 0; Logic 2->Phys 1; Logic 1->Phys 2; Logic 0->Phys 3;



DSI PHY:

Required properties:
@@ -131,6 +156,7 @@ Example: 
		port {

			dsi0_out: endpoint {

				remote-endpoint = <&panel_in>;

				lanes = <0 1 2 3>;

			};

		};

	};