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Commit 256a4bd7 authored by Tony Lindgren's avatar Tony Lindgren
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ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox 



Looks like the register offsets are incorrect in the OMAP mailbox code
(arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.

Acked-by: default avatarVaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: default avatarHenry Chan <enli.chan@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 28ee793e

arch/arm/mach-omap2/mailbox.c

+3 −3
Original line number Diff line number Diff line
@@ -26,9 +26,9 @@ 
#define MAILBOX_IRQSTATUS(u)		(0x100 + 8 * (u))

#define MAILBOX_IRQENABLE(u)		(0x104 + 8 * (u))



#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 10 * (u))

#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 10 * (u))

#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 10 * (u))

#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 0x10 * (u))

#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 0x10 * (u))

#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 0x10 * (u))



#define MAILBOX_IRQ_NEWMSG(m)		(1 << (2 * (m)))

#define MAILBOX_IRQ_NOTFULL(m)		(1 << (2 * (m) + 1))