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Commit 2448d139 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branches 'acpi-soc' and 'acpi-tables' 

* acpi-soc:
  ACPI: APD: Add AMD misc clock handler support
  clk: x86: Add ST oscout platform clock
  ACPI / LPSS: Only call pwm_add_table() for Bay Trail PWM if PMIC HRV is 2

* acpi-tables:
  ACPI / tables: improve comments regarding acpi_parse_entries_array()
parents 6c128e79 3f4ba94e 904aaf80

drivers/acpi/acpi_apd.c

+47 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
 */



#include <linux/clk-provider.h>

#include <linux/platform_data/clk-st.h>

#include <linux/platform_device.h>

#include <linux/pm_domain.h>

#include <linux/clkdev.h>
@@ -72,6 +73,47 @@ static int acpi_apd_setup(struct apd_private_data *pdata) 
}



#ifdef CONFIG_X86_AMD_PLATFORM_DEVICE



static int misc_check_res(struct acpi_resource *ares, void *data)

{

	struct resource res;



	return !acpi_dev_resource_memory(ares, &res);

}



static int st_misc_setup(struct apd_private_data *pdata)

{

	struct acpi_device *adev = pdata->adev;

	struct platform_device *clkdev;

	struct st_clk_data *clk_data;

	struct resource_entry *rentry;

	struct list_head resource_list;

	int ret;



	clk_data = devm_kzalloc(&adev->dev, sizeof(*clk_data), GFP_KERNEL);

	if (!clk_data)

		return -ENOMEM;



	INIT_LIST_HEAD(&resource_list);

	ret = acpi_dev_get_resources(adev, &resource_list, misc_check_res,

				     NULL);

	if (ret < 0)

		return -ENOENT;



	list_for_each_entry(rentry, &resource_list, node) {

		clk_data->base = devm_ioremap(&adev->dev, rentry->res->start,

					      resource_size(rentry->res));

		break;

	}



	acpi_dev_free_resource_list(&resource_list);



	clkdev = platform_device_register_data(&adev->dev, "clk-st",

					       PLATFORM_DEVID_NONE, clk_data,

					       sizeof(*clk_data));

	return PTR_ERR_OR_ZERO(clkdev);

}



static const struct apd_device_desc cz_i2c_desc = {

	.setup = acpi_apd_setup,

	.fixed_clk_rate = 133000000,
@@ -94,6 +136,10 @@ static const struct apd_device_desc cz_uart_desc = { 
	.fixed_clk_rate = 48000000,

	.properties = uart_properties,

};



static const struct apd_device_desc st_misc_desc = {

	.setup = st_misc_setup,

};

#endif



#ifdef CONFIG_ARM64
@@ -179,6 +225,7 @@ static const struct acpi_device_id acpi_apd_device_ids[] = { 
	{ "AMD0020", APD_ADDR(cz_uart_desc) },

	{ "AMDI0020", APD_ADDR(cz_uart_desc) },

	{ "AMD0030", },

	{ "AMD0040", APD_ADDR(st_misc_desc)},

#endif

#ifdef CONFIG_ARM64

	{ "APMC0D0F", APD_ADDR(xgene_i2c_desc) },

drivers/acpi/acpi_lpss.c

+5 −1
Original line number Diff line number Diff line
@@ -69,6 +69,10 @@ ACPI_MODULE_NAME("acpi_lpss"); 
#define LPSS_SAVE_CTX			BIT(4)

#define LPSS_NO_D3_DELAY		BIT(5)



/* Crystal Cove PMIC shares same ACPI ID between different platforms */

#define BYT_CRC_HRV			2

#define CHT_CRC_HRV			3



struct lpss_private_data;



struct lpss_device_desc {
@@ -162,7 +166,7 @@ static void byt_pwm_setup(struct lpss_private_data *pdata) 
	if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))

		return;



	if (!acpi_dev_present("INT33FD", NULL, -1))

	if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))

		pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));

}

drivers/acpi/tables.c

+7 −2
Original line number Diff line number Diff line
@@ -222,7 +222,7 @@ void acpi_table_print_madt_entry(struct acpi_subtable_header *header) 
 * acpi_parse_entries_array - for each proc_num find a suitable subtable

 *

 * @id: table id (for debugging purposes)

 * @table_size: single entry size

 * @table_size: size of the root table

 * @table_header: where does the table start?

 * @proc: array of acpi_subtable_proc struct containing entry id

 *        and associated handler with it
@@ -233,6 +233,11 @@ void acpi_table_print_madt_entry(struct acpi_subtable_header *header) 
 * on it. Assumption is that there's only single handler for particular

 * entry id.

 *

 * The table_size is not the size of the complete ACPI table (the length

 * field in the header struct), but only the size of the root table; i.e.,

 * the offset from the very first byte of the complete ACPI table, to the

 * first byte of the very first subtable.

 *

 * On success returns sum of all matching entries for all proc handlers.

 * Otherwise, -ENODEV or -EINVAL is returned.

 */

drivers/clk/x86/Makefile

+2 −1
Original line number Diff line number Diff line 
obj-$(CONFIG_PMC_ATOM)		+= clk-pmc-atom.o

obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE)	+= clk-st.o

clk-x86-lpss-objs		:= clk-lpt.o

obj-$(CONFIG_X86_INTEL_LPSS)	+= clk-x86-lpss.o
 
obj-$(CONFIG_PMC_ATOM)		+= clk-pmc-atom.o

drivers/clk/x86/clk-st.c

0 → 100644
+77 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: MIT

/*

 * clock framework for AMD Stoney based clocks

 *

 * Copyright 2018 Advanced Micro Devices, Inc.

 */



#include <linux/clk.h>

#include <linux/clkdev.h>

#include <linux/clk-provider.h>

#include <linux/platform_data/clk-st.h>

#include <linux/platform_device.h>



/* Clock Driving Strength 2 register */

#define CLKDRVSTR2	0x28

/* Clock Control 1 register */

#define MISCCLKCNTL1	0x40

/* Auxiliary clock1 enable bit */

#define OSCCLKENB	2

/* 25Mhz auxiliary output clock freq bit */

#define OSCOUT1CLK25MHZ	16



#define ST_CLK_48M	0

#define ST_CLK_25M	1

#define ST_CLK_MUX	2

#define ST_CLK_GATE	3

#define ST_MAX_CLKS	4



static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };

static struct clk_hw *hws[ST_MAX_CLKS];



static int st_clk_probe(struct platform_device *pdev)

{

	struct st_clk_data *st_data;



	st_data = dev_get_platdata(&pdev->dev);

	if (!st_data || !st_data->base)

		return -EINVAL;



	hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0,

						     48000000);

	hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0,

						     25000000);



	hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",

		clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),

		0, st_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0, NULL);



	clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_25M]->clk);



	hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux",

		0, st_data->base + MISCCLKCNTL1, OSCCLKENB,

		CLK_GATE_SET_TO_DISABLE, NULL);



	clk_hw_register_clkdev(hws[ST_CLK_GATE], "oscout1", NULL);



	return 0;

}



static int st_clk_remove(struct platform_device *pdev)

{

	int i;



	for (i = 0; i < ST_MAX_CLKS; i++)

		clk_hw_unregister(hws[i]);

	return 0;

}



static struct platform_driver st_clk_driver = {

	.driver = {

		.name = "clk-st",

		.suppress_bind_attrs = true,

	},

	.probe = st_clk_probe,

	.remove = st_clk_remove,

};

builtin_platform_driver(st_clk_driver);