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Commit 242b1d71 authored by Thierry Reding's avatar Thierry Reding
Browse files

memory: tegra: Add Tegra132 support



The memory controller on Tegra132 is very similar to the one found on
Tegra124. But the Denver CPUs don't have an outer cache, so dcache
maintenance is done slightly differently.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent d1313e78
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+1 −1
Original line number Original line Diff line number Diff line
@@ -219,7 +219,7 @@ config TEGRA_IOMMU_SMMU
	select IOMMU_API
	select IOMMU_API
	help
	help
	  This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
	  This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
	  SoCs (Tegra30 up to Tegra124).
	  SoCs (Tegra30 up to Tegra132).


config EXYNOS_IOMMU
config EXYNOS_IOMMU
	bool "Exynos IOMMU Support"
	bool "Exynos IOMMU Support"
+1 −0
Original line number Original line Diff line number Diff line
@@ -3,5 +3,6 @@ tegra-mc-y := mc.o
tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC)  += tegra30.o
tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC)  += tegra30.o
tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o


obj-$(CONFIG_TEGRA_MC) += tegra-mc.o
obj-$(CONFIG_TEGRA_MC) += tegra-mc.o
+3 −0
Original line number Original line Diff line number Diff line
@@ -57,6 +57,9 @@ static const struct of_device_id tegra_mc_of_match[] = {
#endif
#endif
#ifdef CONFIG_ARCH_TEGRA_124_SOC
#ifdef CONFIG_ARCH_TEGRA_124_SOC
	{ .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
	{ .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
#endif
#ifdef CONFIG_ARCH_TEGRA_132_SOC
	{ .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
#endif
#endif
	{ }
	{ }
};
};
+4 −0
Original line number Original line Diff line number Diff line
@@ -37,4 +37,8 @@ extern const struct tegra_mc_soc tegra114_mc_soc;
extern const struct tegra_mc_soc tegra124_mc_soc;
extern const struct tegra_mc_soc tegra124_mc_soc;
#endif
#endif


#ifdef CONFIG_ARCH_TEGRA_132_SOC
extern const struct tegra_mc_soc tegra132_mc_soc;
#endif

#endif /* MEMORY_TEGRA_MC_H */
#endif /* MEMORY_TEGRA_MC_H */
+33 −0
Original line number Original line Diff line number Diff line
@@ -993,3 +993,36 @@ const struct tegra_mc_soc tegra124_mc_soc = {
	.smmu = &tegra124_smmu_soc,
	.smmu = &tegra124_smmu_soc,
};
};
#endif /* CONFIG_ARCH_TEGRA_124_SOC */
#endif /* CONFIG_ARCH_TEGRA_124_SOC */

#ifdef CONFIG_ARCH_TEGRA_132_SOC
static void tegra132_flush_dcache(struct page *page, unsigned long offset,
				  size_t size)
{
	void *virt = page_address(page) + offset;

	__flush_dcache_area(virt, size);
}

static const struct tegra_smmu_ops tegra132_smmu_ops = {
	.flush_dcache = tegra132_flush_dcache,
};

static const struct tegra_smmu_soc tegra132_smmu_soc = {
	.clients = tegra124_mc_clients,
	.num_clients = ARRAY_SIZE(tegra124_mc_clients),
	.swgroups = tegra124_swgroups,
	.num_swgroups = ARRAY_SIZE(tegra124_swgroups),
	.supports_round_robin_arbitration = true,
	.supports_request_limit = true,
	.num_asids = 128,
	.ops = &tegra132_smmu_ops,
};

const struct tegra_mc_soc tegra132_mc_soc = {
	.clients = tegra124_mc_clients,
	.num_clients = ARRAY_SIZE(tegra124_mc_clients),
	.num_address_bits = 34,
	.atom_size = 32,
	.smmu = &tegra132_smmu_soc,
};
#endif /* CONFIG_ARCH_TEGRA_132_SOC */