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Commit 23988bab authored by Chris Packham's avatar Chris Packham Committed by Gregory CLEMENT
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ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236



The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.

Signed-off-by: default avatarChris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent b4bcfccb
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+1 −2
Original line number Diff line number Diff line
@@ -105,8 +105,7 @@
			ranges =
			       <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
				0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
				0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
				0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>;
				0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */>;

			pcie1: pcie@1,0 {
				device_type = "pci";