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Commit 222c7f51 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: Clarify irq_lock locking, irq handlers 



irq handlers always run with interrupts locally disabled, so
plain spinlocks is all we need. I've also reviewed again that they
all follow the _irq_handler postfix convention.

Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d6207435

drivers/gpu/drm/i915/i915_irq.c

+6 −9
Original line number Diff line number Diff line
@@ -4063,7 +4063,6 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	u16 iir, new_iir;

	u32 pipe_stats[2];

	unsigned long irqflags;

	int pipe;

	u16 flip_mask =

		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
@@ -4079,7 +4078,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) 
		 * It doesn't set the bit in iir again, but it still produces

		 * interrupts (for non-MSI).

		 */

		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

		spin_lock(&dev_priv->irq_lock);

		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)

			i915_handle_error(dev, false,

					  "Command parser error, iir 0x%08x",
@@ -4095,7 +4094,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg) 
			if (pipe_stats[pipe] & 0x8000ffff)

				I915_WRITE(reg, pipe_stats[pipe]);

		}

		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

		spin_unlock(&dev_priv->irq_lock);



		I915_WRITE16(IIR, iir & ~flip_mask);

		new_iir = I915_READ16(IIR); /* Flush posted writes */
@@ -4249,7 +4248,6 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) 
	struct drm_device *dev = arg;

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 iir, new_iir, pipe_stats[I915_MAX_PIPES];

	unsigned long irqflags;

	u32 flip_mask =

		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |

		I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
@@ -4265,7 +4263,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) 
		 * It doesn't set the bit in iir again, but it still produces

		 * interrupts (for non-MSI).

		 */

		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

		spin_lock(&dev_priv->irq_lock);

		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)

			i915_handle_error(dev, false,

					  "Command parser error, iir 0x%08x",
@@ -4281,7 +4279,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg) 
				irq_received = true;

			}

		}

		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

		spin_unlock(&dev_priv->irq_lock);



		if (!irq_received)

			break;
@@ -4476,7 +4474,6 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 iir, new_iir;

	u32 pipe_stats[I915_MAX_PIPES];

	unsigned long irqflags;

	int ret = IRQ_NONE, pipe;

	u32 flip_mask =

		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
@@ -4493,7 +4490,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) 
		 * It doesn't set the bit in iir again, but it still produces

		 * interrupts (for non-MSI).

		 */

		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);

		spin_lock(&dev_priv->irq_lock);

		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)

			i915_handle_error(dev, false,

					  "Command parser error, iir 0x%08x",
@@ -4511,7 +4508,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg) 
				irq_received = true;

			}

		}

		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);

		spin_unlock(&dev_priv->irq_lock);



		if (!irq_received)

			break;