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Commit 21c27cab authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/dt 

Merge "ARM: STi: DT changes for v3.16, v3" from Maxime Coquelin:

Please consider these STi DT updates for v3.16.

This 3rd version takes into account Olof's comments on the v2:
        - Fix upper-cases in labels and node names
        - Sort compatibles order from specific to generic
        - Sort dts entries in Makefile

It also adds support for the B2020 revision E board for STiH416 SoC.

Note that two reset patches are part of this pull request, in order to avoid
compilation breakage.
Adding these two patches in this pull request has been accepted by Philipp Zabel.

* tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti

: (23 commits)
  ARM: sti: stih41x: Provide a proper header for this DTSI file
  ARM: sti: stih416: Enable board LED support for B2020 RevE
  ARM: sti: stih416: Add support for B2020 RevE
  ARM: STi: DT: STiH41x Add clk_ignore_unused to bootargs
  ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9
  ARM: STi: DT: STiH415: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
  ARM: STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock
  ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen A9/DDR/GPU
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen B/C/D/E/F
  ARM: STi: DT: STiH416: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
  ARM: STi: DT: STiH416: Remove unused CLK_S_ICN_REG_0 fixed clock
  ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12
  ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
  ARM: STi: DT: add keyscan for stih41x-b2000
  ARM: STi: DT: add keyscan for stih416
  ARM: STi: DT: add keyscan for stih415
  driver: reset: sti: add keyscan for stih416
  driver: reset: sti: add keyscan for stih415
  ARM: dts: STiH407: Add B2120 board support
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents dee1c20c ca766449

arch/arm/boot/dts/Makefile

+5 −3
Original line number Diff line number Diff line
@@ -336,10 +336,12 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ 
	spear320-evb.dtb \

	spear320-hmi.dtb

dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb

dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \

	stih416-b2000.dtb \

dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \

	stih415-b2000.dtb \

	stih415-b2020.dtb \

	stih416-b2020.dtb

	stih416-b2000.dtb \

	stih416-b2020.dtb \

	stih416-b2020-revE.dtb

dtb-$(CONFIG_ARCH_SUNXI) += \

	sun4i-a10-a1000.dtb \

	sun4i-a10-cubieboard.dtb \

arch/arm/boot/dts/stih407-b2120.dts

0 → 100644
+78 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 STMicroelectronics (R&D) Limited.

 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/dts-v1/;

#include "stih407.dtsi"

/ {

	model = "STiH407 B2120";

	compatible = "st,stih407-b2120", "st,stih407";



	chosen {

		bootargs = "console=ttyAS0,115200";

		linux,stdout-path = &sbc_serial0;

	};



	memory {

		device_type = "memory";

		reg = <0x40000000 0x80000000>;

	};



	aliases {

		ttyAS0 = &sbc_serial0;

	};



	soc {

		sbc_serial0: serial@9530000 {

			status = "okay";

		};



		leds {

			compatible = "gpio-leds";

			red {

				#gpio-cells = <2>;

				label = "Front Panel LED";

				gpios = <&pio4 1 0>;

				linux,default-trigger = "heartbeat";

			};

			green {

				#gpio-cells = <2>;

				gpios = <&pio1 3 0>;

				default-state = "off";

			};

		};



		i2c@9842000 {

			status = "okay";

		};



		i2c@9843000 {

			status = "okay";

		};



		i2c@9844000 {

			status = "okay";

		};



		i2c@9845000 {

			status = "okay";

		};



		i2c@9540000 {

			status = "okay";

		};



		/* SSC11 to HDMI */

		i2c@9541000 {

			status = "okay";

			/* HDMI V1.3a supports Standard mode only */

			clock-frequency = <100000>;

			st,i2c-min-scl-pulse-width-us = <0>;

			st,i2c-min-sda-pulse-width-us = <5>;

		};

	};

};

arch/arm/boot/dts/stih407-clock.dtsi

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+39 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 STMicroelectronics R&D Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/ {

	clocks {

		/*

		 * Fixed 30MHz oscillator inputs to SoC

		 */

		clk_sysin: clk-sysin {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <30000000>;

		};



		/*

		 * ARM Peripheral clock for timers

		 */

		arm_periph_clk: arm-periph-clk {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <600000000>;

		};



		/*

		 * Bootloader initialized system infrastructure clock for

		 * serial devices.

		 */

		clk_ext2f_a9: clockgen-c0@13 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <200000000>;

			clock-output-names = "clk-s-icn-reg-0";

		};

	};

};

arch/arm/boot/dts/stih407-pinctrl.dtsi

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+615 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 STMicroelectronics Limited.

 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * publishhed by the Free Software Foundation.

 */

#include "st-pincfg.h"

#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {



	aliases {

		/* 0-5: PIO_SBC */

		gpio0 = &pio0;

		gpio1 = &pio1;

		gpio2 = &pio2;

		gpio3 = &pio3;

		gpio4 = &pio4;

		gpio5 = &pio5;

		/* 10-19: PIO_FRONT0 */

		gpio6 = &pio10;

		gpio7 = &pio11;

		gpio8 = &pio12;

		gpio9 = &pio13;

		gpio10 = &pio14;

		gpio11 = &pio15;

		gpio12 = &pio16;

		gpio13 = &pio17;

		gpio14 = &pio18;

		gpio15 = &pio19;

		/* 20: PIO_FRONT1 */

		gpio16 = &pio20;

		/* 30-35: PIO_REAR */

		gpio17 = &pio30;

		gpio18 = &pio31;

		gpio19 = &pio32;

		gpio20 = &pio33;

		gpio21 = &pio34;

		gpio22 = &pio35;

		/* 40-42: PIO_FLASH */

		gpio23 = &pio40;

		gpio24 = &pio41;

		gpio25 = &pio42;

	};



	soc {

		pin-controller-sbc {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-sbc-pinctrl";

			st,syscfg = <&syscfg_sbc>;

			reg = <0x0961f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			ranges = <0 0x09610000 0x6000>;



			pio0: gpio@09610000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x100>;

				st,bank-name = "PIO0";

			};

			pio1: gpio@09611000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x100>;

				st,bank-name = "PIO1";

			};

			pio2: gpio@09612000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x100>;

				st,bank-name = "PIO2";

			};

			pio3: gpio@09613000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x3000 0x100>;

				st,bank-name = "PIO3";

			};

			pio4: gpio@09614000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x4000 0x100>;

				st,bank-name = "PIO4";

			};



			pio5: gpio@09615000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x5000 0x100>;

				st,bank-name = "PIO5";

			};



			rc {

				pinctrl_ir: ir0 {

					st,pins {

						ir = <&pio4 0 ALT2 IN>;

					};

				};

			};



			/* SBC_ASC0 - UART10 */

			sbc_serial0 {

				pinctrl_sbc_serial0: sbc_serial0-0 {

					st,pins {

						tx = <&pio3 4 ALT1 OUT>;

						rx = <&pio3 5 ALT1 IN>;

					};

				};

			};

			/* SBC_ASC1 - UART11 */

			sbc_serial1 {

				pinctrl_sbc_serial1: sbc_serial1-0 {

					st,pins {

						tx = <&pio2 6 ALT3 OUT>;

						rx = <&pio2 7 ALT3 IN>;

					};

				};

			};



			i2c10 {

				pinctrl_i2c10_default: i2c10-default {

					st,pins {

						sda = <&pio4 6 ALT1 BIDIR>;

						scl = <&pio4 5 ALT1 BIDIR>;

					};

				};

			};



			i2c11 {

				pinctrl_i2c11_default: i2c11-default {

					st,pins {

						sda = <&pio5 1 ALT1 BIDIR>;

						scl = <&pio5 0 ALT1 BIDIR>;

					};

				};

			};



			keyscan {

				pinctrl_keyscan: keyscan {

					st,pins {

						keyin0 = <&pio4 0 ALT6 IN>;

						keyin1 = <&pio4 5 ALT4 IN>;

						keyin2 = <&pio0 4 ALT2 IN>;

						keyin3 = <&pio2 6 ALT2 IN>;



						keyout0 = <&pio4 6 ALT4 OUT>;

						keyout1 = <&pio1 7 ALT2 OUT>;

						keyout2 = <&pio0 6 ALT2 OUT>;

						keyout3 = <&pio2 7 ALT2 OUT>;

					};

				};

			};



			gmac1 {

				/*

				 * Almost all the boards based on STiH407 SoC have an embedded

				 * switch where the mdio/mdc have been used for managing the SMI

				 * iface via I2C. For this reason these lines can be allocated

				 * by using dedicated configuration (in case of there will be a

				 * standard PHY transceiver on-board).

				 */

				pinctrl_rgmii1: rgmii1-0 {

					st,pins {



						txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;

						txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;

						txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;

						txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;

						txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;

						txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;

						rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;

						rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;

						rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;

						rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;

						rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;

						rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;

						clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;

						phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;

					};

				};



				pinctrl_rgmii1_mdio: rgmii1-mdio {

					st,pins {

						mdio = <&pio1 0 ALT1 OUT BYPASS 0>;

						mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;

						mdint = <&pio1 3 ALT1 IN BYPASS 0>;

					};

				};



				pinctrl_mii1: mii1 {

					st,pins {

						txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;

						txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;

						col = <&pio0 7 ALT1 IN BYPASS 1000>;



						mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;

						mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;

						crs = <&pio1 2 ALT1 IN BYPASS 1000>;

						mdint = <&pio1 3 ALT1 IN BYPASS 0>;

						rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;



						rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;

						rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;

						phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;

					};

				};

			};



			pwm1 {

				pinctrl_pwm1_chan0_default: pwm1-0-default {

					st,pins {

						pwm-out = <&pio3 0 ALT1 OUT>;

					};

				};

				pinctrl_pwm1_chan1_default: pwm1-1-default {

					st,pins {

						pwm-out = <&pio4 4 ALT1 OUT>;

					};

				};

				pinctrl_pwm1_chan2_default: pwm1-2-default {

					st,pins {

						pwm-out = <&pio4 6 ALT3 OUT>;

					};

				};

				pinctrl_pwm1_chan3_default: pwm1-3-default {

					st,pins {

						pwm-out = <&pio4 7 ALT3 OUT>;

					};

				};

			};

		};



		pin-controller-front0 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-front-pinctrl";

			st,syscfg = <&syscfg_front>;

			reg = <0x0920f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			ranges = <0 0x09200000 0x10000>;



			pio10: pio@09200000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x100>;

				st,bank-name = "PIO10";

			};

			pio11: pio@09201000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x100>;

				st,bank-name = "PIO11";

			};

			pio12: pio@09202000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x100>;

				st,bank-name = "PIO12";

			};

			pio13: pio@09203000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x3000 0x100>;

				st,bank-name = "PIO13";

			};

			pio14: pio@09204000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x4000 0x100>;

				st,bank-name = "PIO14";

			};

			pio15: pio@09205000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x5000 0x100>;

				st,bank-name = "PIO15";

			};

			pio16: pio@09206000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x6000 0x100>;

				st,bank-name = "PIO16";

			};

			pio17: pio@09207000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x7000 0x100>;

				st,bank-name = "PIO17";

			};

			pio18: pio@09208000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x8000 0x100>;

				st,bank-name = "PIO18";

			};

			pio19: pio@09209000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x9000 0x100>;

				st,bank-name = "PIO19";

			};



			/* Comms */

			serial0 {

				pinctrl_serial0: serial0-0 {

					st,pins {

						tx = <&pio17 0 ALT1 OUT>;

						rx = <&pio17 1 ALT1 IN>;

					};

				};

			};



			serial1 {

				pinctrl_serial1: serial1-0 {

					st,pins {

						tx = <&pio16 0 ALT1 OUT>;

						rx = <&pio16 1 ALT1 IN>;

					};

				};

			};



			serial2 {

				pinctrl_serial2: serial2-0 {

					st,pins {

						tx = <&pio15 0 ALT1 OUT>;

						rx = <&pio15 1 ALT1 IN>;

					};

				};

			};



			mmc1 {

				pinctrl_sd1: sd1-0 {

					st,pins {

						sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;

						sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;

						sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>;

						sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>;

						sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>;

						sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>;

						sd_led = <&pio16 6 ALT6 OUT>;

						sd_pwren = <&pio16 7 ALT6 OUT>;

						sd_cd = <&pio19 0 ALT6 IN>;

						sd_wp = <&pio19 1 ALT6 IN>;

					};

				};

			};





			i2c0 {

				pinctrl_i2c0_default: i2c0-default {

					st,pins {

						sda = <&pio10 6 ALT2 BIDIR>;

						scl = <&pio10 5 ALT2 BIDIR>;

					};

				};

			};



			i2c1 {

				pinctrl_i2c1_default: i2c1-default {

					st,pins {

						sda = <&pio11 1 ALT2 BIDIR>;

						scl = <&pio11 0 ALT2 BIDIR>;

					};

				};

			};



			i2c2 {

				pinctrl_i2c2_default: i2c2-default {

					st,pins {

						sda = <&pio15 6 ALT2 BIDIR>;

						scl = <&pio15 5 ALT2 BIDIR>;

					};

				};

			};



			i2c3 {

				pinctrl_i2c3_default: i2c3-default {

					st,pins {

						sda = <&pio18 6 ALT1 BIDIR>;

						scl = <&pio18 5 ALT1 BIDIR>;

					};

				};

			};



			spi0 {

				pinctrl_spi0_default: spi0-default {

					st,pins {

						mtsr = <&pio12 6 ALT2 BIDIR>;

						mrst = <&pio12 7 ALT2 BIDIR>;

						scl = <&pio12 5 ALT2 BIDIR>;

					};

				};

			};

		};



		pin-controller-front1 {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-front-pinctrl";

			st,syscfg = <&syscfg_front>;

			reg = <0x0921f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			ranges = <0 0x09210000 0x10000>;



			pio20: pio@09210000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x100>;

				st,bank-name = "PIO20";

			};

		};



		pin-controller-rear {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-rear-pinctrl";

			st,syscfg = <&syscfg_rear>;

			reg = <0x0922f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			ranges = <0 0x09220000 0x6000>;



			pio30: gpio@09220000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x0 0x100>;

				st,bank-name = "PIO30";

			};

			pio31: gpio@09221000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x100>;

				st,bank-name = "PIO31";

			};

			pio32: gpio@09222000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x100>;

				st,bank-name = "PIO32";

			};

			pio33: gpio@09223000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x3000 0x100>;

				st,bank-name = "PIO33";

			};

			pio34: gpio@09224000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x4000 0x100>;

				st,bank-name = "PIO34";

			};

			pio35: gpio@09225000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x5000 0x100>;

				st,bank-name = "PIO35";

			};



			i2c4 {

				pinctrl_i2c4_default: i2c4-default {

					st,pins {

						sda = <&pio30 1 ALT1 BIDIR>;

						scl = <&pio30 0 ALT1 BIDIR>;

					};

				};

			};



			i2c5 {

				pinctrl_i2c5_default: i2c5-default {

					st,pins {

						sda = <&pio34 4 ALT1 BIDIR>;

						scl = <&pio34 3 ALT1 BIDIR>;

					};

				};

			};



			usb3 {

				pinctrl_usb3: usb3-2 {

					st,pins {

						usb-oc-detect = <&pio35 4 ALT1 IN>;

						usb-pwr-enable = <&pio35 5 ALT1 OUT>;

						usb-vbus-valid = <&pio35 6 ALT1 IN>;

					};

				};

			};



			pwm0 {

				pinctrl_pwm0_chan0_default: pwm0-0-default {

					st,pins {

						pwm-out = <&pio31 1 ALT1 OUT>;

					};

				};

			};

		};



		pin-controller-flash {

			#address-cells = <1>;

			#size-cells = <1>;

			compatible = "st,stih407-flash-pinctrl";

			st,syscfg = <&syscfg_flash>;

			reg = <0x0923f080 0x4>;

			reg-names = "irqmux";

			interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>;

			interrupts-names = "irqmux";

			ranges = <0 0x09230000 0x3000>;



			pio40: gpio@09230000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0 0x100>;

				st,bank-name = "PIO40";

			};

			pio41: gpio@09231000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x1000 0x100>;

				st,bank-name = "PIO41";

			};

			pio42: gpio@09232000 {

				gpio-controller;

				#gpio-cells = <1>;

				interrupt-controller;

				#interrupt-cells = <2>;

				reg = <0x2000 0x100>;

				st,bank-name = "PIO42";

			};



			mmc0 {

				pinctrl_mmc0: mmc0-0 {

					st,pins {

						emmc_clk = <&pio40 6 ALT1 BIDIR>;

						emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>;

						emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>;

						emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>;

						emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>;

						emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>;

						emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>;

						emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>;

						emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>;

						emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;

					};

				};

			};

		};

	};

};

arch/arm/boot/dts/stih407.dtsi

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/*

 * Copyright (C) 2014 STMicroelectronics Limited.

 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * publishhed by the Free Software Foundation.

 */

#include "stih407-clock.dtsi"

#include "stih407-pinctrl.dtsi"

/ {

	#address-cells = <1>;

	#size-cells = <1>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <0>;

		};

		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			reg = <1>;

		};

	};



	intc: interrupt-controller@08761000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

		interrupt-controller;

		reg = <0x08761000 0x1000>, <0x08760100 0x100>;

	};



	scu@08760000 {

		compatible = "arm,cortex-a9-scu";

		reg = <0x08760000 0x1000>;

	};



	timer@08760200 {

		interrupt-parent = <&intc>;

		compatible = "arm,cortex-a9-global-timer";

		reg = <0x08760200 0x100>;

		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&arm_periph_clk>;

	};



	l2: cache-controller {

		compatible = "arm,pl310-cache";

		reg = <0x08762000 0x1000>;

		arm,data-latency = <3 3 3>;

		arm,tag-latency = <2 2 2>;

		cache-unified;

		cache-level = <2>;

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		interrupt-parent = <&intc>;

		ranges;

		compatible = "simple-bus";



		syscfg_sbc: sbc-syscfg@9620000 {

			compatible = "st,stih407-sbc-syscfg", "syscon";

			reg = <0x9620000 0x1000>;

		};



		syscfg_front: front-syscfg@9280000 {

			compatible = "st,stih407-front-syscfg", "syscon";

			reg = <0x9280000 0x1000>;

		};



		syscfg_rear: rear-syscfg@9290000 {

			compatible = "st,stih407-rear-syscfg", "syscon";

			reg = <0x9290000 0x1000>;

		};



		syscfg_flash: flash-syscfg@92a0000 {

			compatible = "st,stih407-flash-syscfg", "syscon";

			reg = <0x92a0000 0x1000>;

		};



		syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {

			compatible = "st,stih407-sbc-reg-syscfg", "syscon";

			reg = <0x9600000 0x1000>;

		};



		syscfg_core: core-syscfg@92b0000 {

			compatible = "st,stih407-core-syscfg", "syscon";

			reg = <0x92b0000 0x1000>;

		};



		syscfg_lpm: lpm-syscfg@94b5100 {

			compatible = "st,stih407-lpm-syscfg", "syscon";

			reg = <0x94b5100 0x1000>;

		};



		serial@9830000 {

			compatible = "st,asc";

			reg = <0x9830000 0x2c>;

			interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_serial0>;

			clocks = <&clk_ext2f_a9>;



			status = "disabled";

		};



		serial@9831000 {

			compatible = "st,asc";

			reg = <0x9831000 0x2c>;

			interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_serial1>;

			clocks = <&clk_ext2f_a9>;



			status = "disabled";

		};



		serial@9832000 {

			compatible = "st,asc";

			reg = <0x9832000 0x2c>;

			interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_serial2>;

			clocks = <&clk_ext2f_a9>;



			status = "disabled";

		};



		/* SBC_ASC0 - UART10 */

		sbc_serial0: serial@9530000 {

			compatible = "st,asc";

			reg = <0x9530000 0x2c>;

			interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_sbc_serial0>;

			clocks = <&clk_sysin>;



			status = "disabled";

		};



		serial@9531000 {

			compatible = "st,asc";

			reg = <0x9531000 0x2c>;

			interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_sbc_serial1>;

			clocks = <&clk_sysin>;



			status = "disabled";

		};



		i2c@9840000 {

			compatible = "st,comms-ssc4-i2c";

			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;

			reg = <0x9840000 0x110>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c0_default>;



			status = "disabled";

		};



		i2c@9841000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9841000 0x110>;

			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c1_default>;



			status = "disabled";

		};



		i2c@9842000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9842000 0x110>;

			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c2_default>;



			status = "disabled";

		};



		i2c@9843000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9843000 0x110>;

			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c3_default>;



			status = "disabled";

		};



		i2c@9844000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9844000 0x110>;

			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c4_default>;



			status = "disabled";

		};



		i2c@9845000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9845000 0x110>;

			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_ext2f_a9>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c5_default>;



			status = "disabled";

		};





		/* SSCs on SBC */

		i2c@9540000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9540000 0x110>;

			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_sysin>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c10_default>;



			status = "disabled";

		};



		i2c@9541000 {

			compatible = "st,comms-ssc4-i2c";

			reg = <0x9541000 0x110>;

			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk_sysin>;

			clock-names = "ssc";

			clock-frequency = <400000>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_i2c11_default>;



			status = "disabled";

		};

	};

};