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Commit 214612f9 authored by Russell King's avatar Russell King
Browse files

drm/armada: move writes of LCD_SPU_SRAM_PARA1 under lock 



Move writes of LCD_SPU_SRAM_PARA1 under the irq lock, so that we can
add this to the frame updates at interrupt time when disabling a
plane.

Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
parent eaa66279

drivers/gpu/drm/armada/armada_crtc.c

+6 −4
Original line number Diff line number Diff line
@@ -657,8 +657,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc, 
	/* Now compute the divider for real */

	dcrtc->variant->compute_clock(dcrtc, adj, &sclk);



	/* Ensure graphic fifo is enabled */

	armada_reg_queue_mod(regs, i, 0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);

	armada_reg_queue_set(regs, i, sclk, LCD_CFG_SCLK_DIV);



	if (interlaced ^ dcrtc->interlaced) {
@@ -671,6 +669,9 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc, 


	spin_lock_irqsave(&dcrtc->irq_lock, flags);



	/* Ensure graphic fifo is enabled */

	armada_reg_queue_mod(regs, i, 0, CFG_PDWN64x66, LCD_SPU_SRAM_PARA1);



	/* Even interlaced/progressive frame */

	dcrtc->v[1].spu_v_h_total = adj->crtc_vtotal << 16 |

				    adj->crtc_htotal;
@@ -869,9 +870,11 @@ static int armada_drm_crtc_cursor_update(struct armada_crtc *dcrtc, bool reload) 
		return 0;

	}



	spin_lock_irq(&dcrtc->irq_lock);

	para1 = readl_relaxed(dcrtc->base + LCD_SPU_SRAM_PARA1);

	armada_updatel(CFG_CSB_256x32, CFG_CSB_256x32 | CFG_PDWN256x32,

		       dcrtc->base + LCD_SPU_SRAM_PARA1);

	spin_unlock_irq(&dcrtc->irq_lock);



	/*

	 * Initialize the transparency if the SRAM was powered down.
@@ -1157,9 +1160,8 @@ int armada_drm_plane_disable(struct drm_plane *plane, 


	spin_lock_irq(&dcrtc->irq_lock);

	armada_updatel(0, enable_mask, dcrtc->base + LCD_SPU_DMA_CTRL0);

	spin_unlock_irq(&dcrtc->irq_lock);



	armada_updatel(sram_para1, 0, dcrtc->base + LCD_SPU_SRAM_PARA1);

	spin_unlock_irq(&dcrtc->irq_lock);



	return 0;

}

drivers/gpu/drm/armada/armada_overlay.c

+3 −2
Original line number Diff line number Diff line
@@ -162,8 +162,9 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, 
		return 0;

	} else if (~dplane->base.state.ctrl0 & ctrl0 & CFG_DMA_ENA) {

		/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */

		armada_updatel(0, CFG_PDWN16x66 | CFG_PDWN32x66,

			       dcrtc->base + LCD_SPU_SRAM_PARA1);

		armada_reg_queue_mod(work->regs, idx,

				     0, CFG_PDWN16x66 | CFG_PDWN32x66,

				     LCD_SPU_SRAM_PARA1);

	}



	if (armada_drm_plane_work_wait(&dplane->base, HZ / 25) == 0)