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Commit 2130de7d authored by Sean Christopherson's avatar Sean Christopherson Committed by Greg Kroah-Hartman
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KVM: nVMX: Use correct root level for nested EPT shadow page tables 



[ Upstream commit 148d735eb55d32848c3379e460ce365f2c1cbe4b ]

Hardcode the EPT page-walk level for L2 to be 4 levels, as KVM's MMU
currently also hardcodes the page walk level for nested EPT to be 4
levels.  The L2 guest is all but guaranteed to soft hang on its first
instruction when L1 is using EPT, as KVM will construct 4-level page
tables and then tell hardware to use 5-level page tables.

Fixes: 855feb67 ("KVM: MMU: Add 5 level EPT & Shadow page table support.")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9c270ce3

arch/x86/kvm/vmx.c

+3 −0
Original line number Diff line number Diff line
@@ -5302,6 +5302,9 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 


static int get_ept_level(struct kvm_vcpu *vcpu)

{

	/* Nested EPT currently only supports 4-level walks. */

	if (is_guest_mode(vcpu) && nested_cpu_has_ept(get_vmcs12(vcpu)))

		return 4;

	if (cpu_has_vmx_ept_5levels() && (cpuid_maxphyaddr(vcpu) > 48))

		return 5;

	return 4;