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Commit 20d0dfe6 authored by Sagi Grimberg's avatar Sagi Grimberg
Browse files

nvme: move ctrl cap to struct nvme_ctrl 



All transports use either a private cache of controller cap or an on-stack
copy, move it to the generic struct nvme_ctrl. In the future it will also
be maintained by the core.

Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarJohannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: default avatarMax Gurtovoy <maxg@mellanox.com>
Signed-off-by: default avatarSagi Grimberg <sagi@grimberg.me>
parent d858e5f0

drivers/nvme/host/fc.c

+3 −5
Original line number Diff line number Diff line
@@ -152,8 +152,6 @@ struct nvme_fc_ctrl { 


	u64			association_id;



	u64			cap;



	struct list_head	ctrl_list;	/* rport->ctrl_list */



	struct blk_mq_tag_set	admin_tag_set;
@@ -2328,7 +2326,7 @@ nvme_fc_create_association(struct nvme_fc_ctrl *ctrl) 
	 * prior connection values

	 */



	ret = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);

	ret = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->ctrl.cap);

	if (ret) {

		dev_err(ctrl->ctrl.device,

			"prop_get NVME_REG_CAP failed\n");
@@ -2336,9 +2334,9 @@ nvme_fc_create_association(struct nvme_fc_ctrl *ctrl) 
	}



	ctrl->ctrl.sqsize =

		min_t(int, NVME_CAP_MQES(ctrl->cap) + 1, ctrl->ctrl.sqsize);

		min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap) + 1, ctrl->ctrl.sqsize);



	ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);

	ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);

	if (ret)

		goto out_disconnect_admin_queue;

drivers/nvme/host/nvme.h

+1 −0
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ struct nvme_ctrl { 
	u32 ctrl_config;

	u32 queue_count;



	u64 cap;

	u32 page_size;

	u32 max_hw_sectors;

	u16 oncs;

drivers/nvme/host/pci.c

+9 −11
Original line number Diff line number Diff line
@@ -1144,8 +1144,7 @@ static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 
	if (shutdown)

		nvme_shutdown_ctrl(&dev->ctrl);

	else

		nvme_disable_ctrl(&dev->ctrl, lo_hi_readq(

						dev->bar + NVME_REG_CAP));

		nvme_disable_ctrl(&dev->ctrl, dev->ctrl.cap);



	spin_lock_irq(&nvmeq->q_lock);

	nvme_process_cq(nvmeq);
@@ -1388,7 +1387,6 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) 
{

	int result;

	u32 aqa;

	u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP);

	struct nvme_queue *nvmeq;



	result = nvme_remap_bar(dev, db_bar_size(dev, 0));
@@ -1396,13 +1394,13 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) 
		return result;



	dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ?

						NVME_CAP_NSSRC(cap) : 0;

				NVME_CAP_NSSRC(dev->ctrl.cap) : 0;



	if (dev->subsystem &&

	    (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO))

		writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS);



	result = nvme_disable_ctrl(&dev->ctrl, cap);

	result = nvme_disable_ctrl(&dev->ctrl, dev->ctrl.cap);

	if (result < 0)

		return result;
@@ -1421,7 +1419,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev) 
	lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ);

	lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ);



	result = nvme_enable_ctrl(&dev->ctrl, cap);

	result = nvme_enable_ctrl(&dev->ctrl, dev->ctrl.cap);

	if (result)

		return result;
@@ -1865,7 +1863,6 @@ static int nvme_dev_add(struct nvme_dev *dev) 


static int nvme_pci_enable(struct nvme_dev *dev)

{

	u64 cap;

	int result = -ENOMEM;

	struct pci_dev *pdev = to_pci_dev(dev->dev);
@@ -1892,10 +1889,11 @@ static int nvme_pci_enable(struct nvme_dev *dev) 
	if (result < 0)

		return result;



	cap = lo_hi_readq(dev->bar + NVME_REG_CAP);

	dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP);



	dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);

	dev->db_stride = 1 << NVME_CAP_STRIDE(cap);

	dev->q_depth = min_t(int, NVME_CAP_MQES(dev->ctrl.cap) + 1,

				NVME_Q_DEPTH);

	dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap);

	dev->dbs = dev->bar + 4096;



	/*
@@ -1909,7 +1907,7 @@ static int nvme_pci_enable(struct nvme_dev *dev) 
			dev->q_depth);

	} else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&

		   (pdev->device == 0xa821 || pdev->device == 0xa822) &&

		   NVME_CAP_MQES(cap) == 0) {

		   NVME_CAP_MQES(dev->ctrl.cap) == 0) {

		dev->q_depth = 64;

		dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "

                        "set queue depth=%u\n", dev->q_depth);

drivers/nvme/host/rdma.c

+5 −5
Original line number Diff line number Diff line
@@ -118,7 +118,6 @@ struct nvme_rdma_ctrl { 
	struct blk_mq_tag_set	admin_tag_set;

	struct nvme_rdma_device	*device;



	u64			cap;

	u32			max_fr_pages;



	struct sockaddr_storage addr;
@@ -728,7 +727,7 @@ static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 


	set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);



	ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);

	ret = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);

	if (ret)

		goto requeue;
@@ -1573,7 +1572,8 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) 


	set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[0].flags);



	error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);

	error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP,

			&ctrl->ctrl.cap);

	if (error) {

		dev_err(ctrl->ctrl.device,

			"prop_get NVME_REG_CAP failed\n");
@@ -1581,9 +1581,9 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl) 
	}



	ctrl->ctrl.sqsize =

		min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->ctrl.sqsize);

		min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);



	error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);

	error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);

	if (error)

		goto out_cleanup_queue;

drivers/nvme/target/loop.c

+3 −4
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ struct nvme_loop_ctrl { 
	struct blk_mq_tag_set	admin_tag_set;



	struct list_head	list;

	u64			cap;

	struct blk_mq_tag_set	tag_set;

	struct nvme_loop_iod	async_event_iod;

	struct nvme_ctrl	ctrl;
@@ -387,7 +386,7 @@ static int nvme_loop_configure_admin_queue(struct nvme_loop_ctrl *ctrl) 
	if (error)

		goto out_cleanup_queue;



	error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->cap);

	error = nvmf_reg_read64(&ctrl->ctrl, NVME_REG_CAP, &ctrl->ctrl.cap);

	if (error) {

		dev_err(ctrl->ctrl.device,

			"prop_get NVME_REG_CAP failed\n");
@@ -395,9 +394,9 @@ static int nvme_loop_configure_admin_queue(struct nvme_loop_ctrl *ctrl) 
	}



	ctrl->ctrl.sqsize =

		min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->ctrl.sqsize);

		min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);



	error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->cap);

	error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);

	if (error)

		goto out_cleanup_queue;