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Commit 209394ae authored by Boris Brezillon's avatar Boris Brezillon Committed by Maxime Ripard
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ARM: sunxi: dt: declare the r_pio pin controller for A31 SoC 



The A31 SoC has a different pin controller for PL and PM banks.
Define this new controller in the device tree.

Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent cc08f5e9

arch/arm/boot/dts/sun6i-a31.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -734,5 +734,19 @@ 
			compatible = "allwinner,sun6i-a31-cpuconfig";

			reg = <0x01f01c00 0x300>;

		};



		r_pio: pinctrl@01f02c00 {

			compatible = "allwinner,sun6i-a31-r-pinctrl";

			reg = <0x01f02c00 0x400>;

			interrupts = <0 45 4>,

				     <0 46 4>;

			clocks = <&apb0_gates 0>;

			resets = <&apb0_rst 0>;

			gpio-controller;

			interrupt-controller;

			#address-cells = <1>;

			#size-cells = <0>;

			#gpio-cells = <3>;

		};

	};

};