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Commit 2040c473 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux into drm-next 

More features for 4.14.  Nothing too major here.  I have a few more additional
patches for large page support in vega10 among other things, but they require
some resevation object patches from drm-misc-next, so I'll send that request
once you've pulled the latest drm-misc-next.  Highlights:
- Fixes for ACP audio on stoney
- SR-IOV fixes for vega10
- various powerplay fixes
- lots of code clean up

* 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (62 commits)
  drm/amdgpu/gfx7: fix function name
  drm/amd/amdgpu: Disabling Power Gating for Stoney platform
  drm/amd/amdgpu: Added a quirk for Stoney platform
  drm/amdgpu: jt_size was wrongly counted twice
  drm/amdgpu: fix missing endian-safe guard
  drm/amdgpu: ignore digest_size when loading sdma fw for raven
  drm/amdgpu: Uninitialized variable in amdgpu_ttm_backend_bind()
  drm/amd/powerplay: fix coding style in hwmgr.c
  drm/amd/powerplay: refine dmesg info under powerplay.
  drm/amdgpu: don't finish the ring if not initialized
  drm/radeon: Fix preferred typo
  drm/amdgpu: Fix preferred typo
  drm/radeon: Fix stolen typo
  drm/amdgpu: Fix stolen typo
  drm/amd/powerplay: fix coccinelle warnings in vega10_hwmgr.c
  drm/amdgpu: set gfx_v9_0_ip_funcs as static
  drm/radeon: switch to drm_*{get,put} helpers
  drm/amdgpu: switch to drm_*{get,put} helpers
  drm/amd/powerplay: add CZ profile support
  drm/amd/powerplay: fix PSI not enabled by kmd
  ...
parents 3154b133 37899a52

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+18 −82
Original line number Diff line number Diff line
@@ -373,78 +373,10 @@ struct amdgpu_clock { 
};



/*

 * BO.

 * GEM.

 */

struct amdgpu_bo_list_entry {

	struct amdgpu_bo		*robj;

	struct ttm_validate_buffer	tv;

	struct amdgpu_bo_va		*bo_va;

	uint32_t			priority;

	struct page			**user_pages;

	int				user_invalidated;

};



struct amdgpu_bo_va_mapping {

	struct list_head		list;

	struct rb_node			rb;

	uint64_t			start;

	uint64_t			last;

	uint64_t			__subtree_last;

	uint64_t			offset;

	uint64_t			flags;

};



/* bo virtual addresses in a specific vm */

struct amdgpu_bo_va {

	/* protected by bo being reserved */

	struct list_head		bo_list;

	struct dma_fence	        *last_pt_update;

	unsigned			ref_count;



	/* protected by vm mutex and spinlock */

	struct list_head		vm_status;



	/* mappings for this bo_va */

	struct list_head		invalids;

	struct list_head		valids;



	/* constant after initialization */

	struct amdgpu_vm		*vm;

	struct amdgpu_bo		*bo;

};



#define AMDGPU_GEM_DOMAIN_MAX		0x3



struct amdgpu_bo {

	/* Protected by tbo.reserved */

	u32				prefered_domains;

	u32				allowed_domains;

	struct ttm_place		placements[AMDGPU_GEM_DOMAIN_MAX + 1];

	struct ttm_placement		placement;

	struct ttm_buffer_object	tbo;

	struct ttm_bo_kmap_obj		kmap;

	u64				flags;

	unsigned			pin_count;

	void				*kptr;

	u64				tiling_flags;

	u64				metadata_flags;

	void				*metadata;

	u32				metadata_size;

	unsigned			prime_shared_count;

	/* list of all virtual address to which this bo

	 * is associated to

	 */

	struct list_head		va;

	/* Constant after initialization */

	struct drm_gem_object		gem_base;

	struct amdgpu_bo		*parent;

	struct amdgpu_bo		*shadow;



	struct ttm_bo_kmap_obj		dma_buf_vmap;

	struct amdgpu_mn		*mn;

	struct list_head		mn_list;

	struct list_head		shadow_list;

};

#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, gem_base)



void amdgpu_gem_object_free(struct drm_gem_object *obj);
@@ -678,15 +610,15 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT 
	/* overlap the doorbell assignment with VCN as they are  mutually exclusive

	 * VCE engine's doorbell is 32 bit and two VCE ring share one QWORD

	 */

	AMDGPU_DOORBELL64_RING0_1                 = 0xF8,

	AMDGPU_DOORBELL64_RING2_3                 = 0xF9,

	AMDGPU_DOORBELL64_RING4_5                 = 0xFA,

	AMDGPU_DOORBELL64_RING6_7                 = 0xFB,

	AMDGPU_DOORBELL64_UVD_RING0_1             = 0xF8,

	AMDGPU_DOORBELL64_UVD_RING2_3             = 0xF9,

	AMDGPU_DOORBELL64_UVD_RING4_5             = 0xFA,

	AMDGPU_DOORBELL64_UVD_RING6_7             = 0xFB,



	AMDGPU_DOORBELL64_UVD_RING0_1             = 0xFC,

	AMDGPU_DOORBELL64_UVD_RING2_3             = 0xFD,

	AMDGPU_DOORBELL64_UVD_RING4_5             = 0xFE,

	AMDGPU_DOORBELL64_UVD_RING6_7             = 0xFF,

	AMDGPU_DOORBELL64_VCE_RING0_1             = 0xFC,

	AMDGPU_DOORBELL64_VCE_RING2_3             = 0xFD,

	AMDGPU_DOORBELL64_VCE_RING4_5             = 0xFE,

	AMDGPU_DOORBELL64_VCE_RING6_7             = 0xFF,



	AMDGPU_DOORBELL64_MAX_ASSIGNMENT          = 0xFF,

	AMDGPU_DOORBELL64_INVALID                 = 0xFFFF
@@ -825,6 +757,14 @@ struct amdgpu_fpriv { 
/*

 * residency list

 */

struct amdgpu_bo_list_entry {

	struct amdgpu_bo		*robj;

	struct ttm_validate_buffer	tv;

	struct amdgpu_bo_va		*bo_va;

	uint32_t			priority;

	struct page			**user_pages;

	int				user_invalidated;

};



struct amdgpu_bo_list {

	struct mutex lock;
@@ -1191,10 +1131,6 @@ struct amdgpu_wb { 


int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);

void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);

int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb);

int amdgpu_wb_get_256Bit(struct amdgpu_device *adev, u32 *wb);

void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb);

void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb);



void amdgpu_get_pcie_info(struct amdgpu_device *adev);
@@ -1488,7 +1424,7 @@ struct amdgpu_device { 
	bool				is_atom_fw;

	uint8_t				*bios;

	uint32_t			bios_size;

	struct amdgpu_bo		*stollen_vga_memory;

	struct amdgpu_bo		*stolen_vga_memory;

	uint32_t			bios_scratch_reg_offset;

	uint32_t			bios_scratch[AMDGPU_BIOS_NUM_SCRATCH];

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c

+46 −26
Original line number Diff line number Diff line
@@ -285,7 +285,7 @@ static int acp_hw_init(void *handle) 
		return 0;

	else if (r)

		return r;



	if (adev->asic_type != CHIP_STONEY) {

		adev->acp.acp_genpd = kzalloc(sizeof(struct acp_pm_domain), GFP_KERNEL);

		if (adev->acp.acp_genpd == NULL)

			return -ENOMEM;
@@ -298,6 +298,7 @@ static int acp_hw_init(void *handle) 
		adev->acp.acp_genpd->cgs_dev = adev->acp.cgs_device;



		pm_genpd_init(&adev->acp.acp_genpd->gpd, NULL, false);

	}



	adev->acp.acp_cell = kzalloc(sizeof(struct mfd_cell) * ACP_DEVS,

							GFP_KERNEL);
@@ -319,14 +320,29 @@ static int acp_hw_init(void *handle) 
		return -ENOMEM;

	}



	switch (adev->asic_type) {

	case CHIP_STONEY:

		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |

			DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;

		break;

	default:

		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;

	}

	i2s_pdata[0].cap = DWC_I2S_PLAY;

	i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;

	i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET;

	i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET;



	switch (adev->asic_type) {

	case CHIP_STONEY:

		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |

			DW_I2S_QUIRK_COMP_PARAM1 |

			DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;

		break;

	default:

		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |

			DW_I2S_QUIRK_COMP_PARAM1;

	}



	i2s_pdata[1].cap = DWC_I2S_RECORD;

	i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000;

	i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;
@@ -373,6 +389,7 @@ static int acp_hw_init(void *handle) 
	if (r)

		return r;



	if (adev->asic_type != CHIP_STONEY) {

		for (i = 0; i < ACP_DEVS ; i++) {

			dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);

			r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev);
@@ -381,6 +398,7 @@ static int acp_hw_init(void *handle) 
				return r;

			}

		}

	}



	return 0;

}
@@ -398,9 +416,10 @@ static int acp_hw_fini(void *handle) 
	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	/* return early if no ACP */

	if (!adev->acp.acp_genpd)

	if (!adev->acp.acp_cell)

		return 0;



	if (adev->acp.acp_genpd) {

		for (i = 0; i < ACP_DEVS ; i++) {

			dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i);

			ret = pm_genpd_remove_device(&adev->acp.acp_genpd->gpd, dev);
@@ -408,10 +427,11 @@ static int acp_hw_fini(void *handle) 
			if (ret)

				dev_err(dev, "remove dev from genpd failed\n");

		}

		kfree(adev->acp.acp_genpd);

	}



	mfd_remove_devices(adev->acp.parent);

	kfree(adev->acp.acp_res);

	kfree(adev->acp.acp_genpd);

	kfree(adev->acp.acp_cell);



	return 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+2 −2
Original line number Diff line number Diff line
@@ -30,10 +30,10 @@ 
#include <drm/drmP.h>

#include <drm/drm_crtc_helper.h>

#include "amdgpu.h"

#include "amdgpu_pm.h"

#include "amd_acpi.h"

#include "atom.h"



extern void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);

/* Call the ATIF method

 */

/**
@@ -289,7 +289,7 @@ static int amdgpu_atif_get_sbios_requests(acpi_handle handle, 
 * handles it.

 * Returns NOTIFY code

 */

int amdgpu_atif_handler(struct amdgpu_device *adev,

static int amdgpu_atif_handler(struct amdgpu_device *adev,

			struct acpi_bus_event *event)

{

	struct amdgpu_atif *atif = &adev->atif;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+20 −20
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ 
#include "amdgpu_gfx.h"

#include <linux/module.h>



const struct kfd2kgd_calls *kfd2kgd;

const struct kgd2kfd_calls *kgd2kfd;

bool (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
@@ -61,8 +60,21 @@ int amdgpu_amdkfd_init(void) 
	return ret;

}



bool amdgpu_amdkfd_load_interface(struct amdgpu_device *adev)

void amdgpu_amdkfd_fini(void)

{

	if (kgd2kfd) {

		kgd2kfd->exit();

		symbol_put(kgd2kfd_init);

	}

}



void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)

{

	const struct kfd2kgd_calls *kfd2kgd;



	if (!kgd2kfd)

		return;



	switch (adev->asic_type) {

#ifdef CONFIG_DRM_AMDGPU_CIK

	case CHIP_KAVERI:
@@ -73,23 +85,10 @@ bool amdgpu_amdkfd_load_interface(struct amdgpu_device *adev) 
		kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();

		break;

	default:

		return false;

		dev_info(adev->dev, "kfd not supported on this ASIC\n");

		return;

	}



	return true;

}



void amdgpu_amdkfd_fini(void)

{

	if (kgd2kfd) {

		kgd2kfd->exit();

		symbol_put(kgd2kfd_init);

	}

}



void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)

{

	if (kgd2kfd)

	adev->kfd = kgd2kfd->probe((struct kgd_dev *)adev,

				   adev->pdev, kfd2kgd);

}
@@ -184,7 +183,8 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size, 
		return -ENOMEM;



	r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_GTT,

			     AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, NULL, &(*mem)->bo);

			     AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, NULL, 0,

			     &(*mem)->bo);

	if (r) {

		dev_err(adev->dev,

			"failed to allocate BO for amdkfd (%d)\n", r);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+0 −2
Original line number Diff line number Diff line
@@ -39,8 +39,6 @@ struct kgd_mem { 
int amdgpu_amdkfd_init(void);

void amdgpu_amdkfd_fini(void);



bool amdgpu_amdkfd_load_interface(struct amdgpu_device *adev);



void amdgpu_amdkfd_suspend(struct amdgpu_device *adev);

int amdgpu_amdkfd_resume(struct amdgpu_device *adev);

void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,