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Commit 1f9f5201 authored by Ivan Khoronzhuk's avatar Ivan Khoronzhuk Committed by Santosh Shilimkar
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ARM: dts: keystone: Fix control register range for clktsip



The control register range for clktsio interferes with clkaemifspi clock.
And it causes issues for NAND/AEMIF. So fix it.

Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 754f67cd
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+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ clocks {
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk16>;
		clock-output-names = "tsip";
		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
		reg-names = "control", "domain";
		domain-id = <0>;
	};