Loading arch/arm/mach-ep93xx/core.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release); static struct resource ep93xx_ac97_resources[] = { static struct resource ep93xx_ac97_resources[] = { { { .start = EP93XX_AAC_PHYS_BASE, .start = EP93XX_AAC_PHYS_BASE, .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, .end = EP93XX_AAC_PHYS_BASE + 0xac - 1, .flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM, }, }, { { Loading arch/arm/mach-imx/mach-mx25_3ds.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = { KEY(3, 3, KEY_POWER), KEY(3, 3, KEY_POWER), }; }; static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = { .keymap = mx25pdk_keymap, .keymap = mx25pdk_keymap, .keymap_size = ARRAY_SIZE(mx25pdk_keymap), .keymap_size = ARRAY_SIZE(mx25pdk_keymap), }; }; Loading arch/arm/mach-mxs/clock-mx23.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ if (reg | (1 << clk->enable_shift)) { \ if (reg & (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ return -EINVAL; \ } \ } \ Loading Loading @@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ { \ if (parent != clk->parent) { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ HW_CLKCTRL_CLKSEQ_TOG); \ CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ clk->parent = parent; \ } \ } \ \ \ Loading arch/arm/mach-mxs/clock-mx28.c +3 −4 Original line number Original line Diff line number Diff line Loading @@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ } else { \ } else { \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ if (reg | (1 << clk->enable_shift)) { \ if (reg & (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ return -EINVAL; \ } \ } \ } \ } \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ \ \ for (i = 10000; i; i--) \ for (i = 10000; i; i--) \ if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ Loading Loading @@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ { \ if (parent != clk->parent) { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ HW_CLKCTRL_CLKSEQ_TOG); \ CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ clk->parent = parent; \ } \ } \ \ \ Loading Loading @@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) Loading arch/arm/mach-mxs/clock.c +0 −2 Original line number Original line Diff line number Diff line Loading @@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk) if (clk->disable) if (clk->disable) clk->disable(clk); clk->disable(clk); __clk_disable(clk->parent); __clk_disable(clk->parent); __clk_disable(clk->secondary); } } } } Loading @@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk) if (clk->usecount++ == 0) { if (clk->usecount++ == 0) { __clk_enable(clk->parent); __clk_enable(clk->parent); __clk_enable(clk->secondary); if (clk->enable) if (clk->enable) clk->enable(clk); clk->enable(clk); Loading Loading
arch/arm/mach-ep93xx/core.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release); static struct resource ep93xx_ac97_resources[] = { static struct resource ep93xx_ac97_resources[] = { { { .start = EP93XX_AAC_PHYS_BASE, .start = EP93XX_AAC_PHYS_BASE, .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, .end = EP93XX_AAC_PHYS_BASE + 0xac - 1, .flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM, }, }, { { Loading
arch/arm/mach-imx/mach-mx25_3ds.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = { KEY(3, 3, KEY_POWER), KEY(3, 3, KEY_POWER), }; }; static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = { .keymap = mx25pdk_keymap, .keymap = mx25pdk_keymap, .keymap_size = ARRAY_SIZE(mx25pdk_keymap), .keymap_size = ARRAY_SIZE(mx25pdk_keymap), }; }; Loading
arch/arm/mach-mxs/clock-mx23.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ if (reg | (1 << clk->enable_shift)) { \ if (reg & (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ return -EINVAL; \ } \ } \ Loading Loading @@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ { \ if (parent != clk->parent) { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ HW_CLKCTRL_CLKSEQ_TOG); \ CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ clk->parent = parent; \ } \ } \ \ \ Loading
arch/arm/mach-mxs/clock-mx28.c +3 −4 Original line number Original line Diff line number Diff line Loading @@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \ } else { \ } else { \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg &= ~BM_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ reg |= div << BP_CLKCTRL_##dr##_DIV; \ if (reg | (1 << clk->enable_shift)) { \ if (reg & (1 << clk->enable_shift)) { \ pr_err("%s: clock is gated\n", __func__); \ pr_err("%s: clock is gated\n", __func__); \ return -EINVAL; \ return -EINVAL; \ } \ } \ } \ } \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ \ \ for (i = 10000; i; i--) \ for (i = 10000; i; i--) \ if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ Loading Loading @@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \ { \ { \ if (parent != clk->parent) { \ if (parent != clk->parent) { \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ HW_CLKCTRL_CLKSEQ_TOG); \ CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \ clk->parent = parent; \ clk->parent = parent; \ } \ } \ \ \ Loading Loading @@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) Loading
arch/arm/mach-mxs/clock.c +0 −2 Original line number Original line Diff line number Diff line Loading @@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk) if (clk->disable) if (clk->disable) clk->disable(clk); clk->disable(clk); __clk_disable(clk->parent); __clk_disable(clk->parent); __clk_disable(clk->secondary); } } } } Loading @@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk) if (clk->usecount++ == 0) { if (clk->usecount++ == 0) { __clk_enable(clk->parent); __clk_enable(clk->parent); __clk_enable(clk->secondary); if (clk->enable) if (clk->enable) clk->enable(clk); clk->enable(clk); Loading