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Commit 1ea0999e authored by Roger Quadros's avatar Roger Quadros Committed by Paul Walmsley
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ARM: DRA7: hwmod: Fixup SATA hwmod 



Get rid of optional clock as that is now managed by the
AHCI platform driver.

Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.

Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Reviewed-by: default avatarRajendra Nayak <rnayak@ti.com>
Tested-by: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 0cd8d405

arch/arm/mach-omap2/omap_hwmod_7xx_data.c

+1 −5
Original line number Diff line number Diff line
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = { 
};



/* sata */

static struct omap_hwmod_opt_clk sata_opt_clks[] = {

	{ .role = "ref_clk", .clk = "sata_ref_clk" },

};



static struct omap_hwmod dra7xx_sata_hwmod = {

	.name		= "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = { 
	.clkdm_name	= "l3init_clkdm",

	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,

	.main_clk	= "func_48m_fclk",

	.mpu_rt_idx	= 1,

	.prcm = {

		.omap4 = {

			.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { 
			.modulemode   = MODULEMODE_SWCTRL,

		},

	},

	.opt_clks	= sata_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(sata_opt_clks),

};



/*