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Commit 1e11cbf7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v4.15-rockchip-dts64-2' of... 

Merge tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner:

Support for the RGA (raster graphics accelerator) on rk3399
and efuses on rk3368.

* tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add efuse for RK3368 SoCs
  arm64: dts: rockchip: add RGA device node for RK3399
  clk: rockchip: add more rk3188 graphics clock ids
  clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
parents 87f89ace 6f8c5393

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -786,6 +786,22 @@ 
		status = "disabled";

	};



	efuse256: efuse@ffb00000 {

		compatible = "rockchip,rk3368-efuse";

		reg = <0x0 0xffb00000 0x0 0x20>;

		#address-cells = <1>;

		#size-cells = <1>;

		clocks = <&cru PCLK_EFUSE256>;

		clock-names = "pclk_efuse";



		cpu_leakage: cpu-leakage@17 {

			reg = <0x17 0x1>;

		};

		temp_adjust: temp-adjust@1f {

			reg = <0x1f 0x1>;

		};

	};



	gic: interrupt-controller@ffb71000 {

		compatible = "arm,gic-400";

		interrupt-controller;

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -1204,6 +1204,17 @@ 
		status = "disabled";

	};



	rga: rga@ff680000 {

		compatible = "rockchip,rk3399-rga";

		reg = <0x0 0xff680000 0x0 0x10000>;

		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;

		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;

		clock-names = "aclk", "hclk", "sclk";

		resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;

		reset-names = "core", "axi", "ahb";

		power-domains = <&power RK3399_PD_RGA>;

	};



	efuse0: efuse@ff690000 {

		compatible = "rockchip,rk3399-efuse";

		reg = <0x0 0xff690000 0x0 0x80>;

include/dt-bindings/clock/rk3188-cru-common.h

+7 −2
Original line number Diff line number Diff line
@@ -68,12 +68,14 @@ 
#define ACLK_LCDC1		196

#define ACLK_GPU		197

#define ACLK_SMC		198

#define ACLK_CIF		199

#define ACLK_CIF1		199

#define ACLK_IPP		200

#define ACLK_RGA		201

#define ACLK_CIF0		202

#define ACLK_CPU		203

#define ACLK_PERI		204

#define ACLK_VEPU		205

#define ACLK_VDPU		206



/* pclk gates */

#define PCLK_GRF		320
@@ -134,8 +136,11 @@ 
#define HCLK_NANDC0		467

#define HCLK_CPU		468

#define HCLK_PERI		469

#define HCLK_CIF1		470

#define HCLK_VEPU		471

#define HCLK_VDPU		472



#define CLK_NR_CLKS		(HCLK_PERI + 1)

#define CLK_NR_CLKS		(HCLK_VDPU + 1)



/* soft-reset indices */

#define SRST_MCORE		2

include/dt-bindings/clock/rk3368-cru.h

+1 −0
Original line number Diff line number Diff line
@@ -156,6 +156,7 @@ 
#define PCLK_ISP		366

#define PCLK_VIP		367

#define PCLK_WDT		368

#define PCLK_EFUSE256		369



/* hclk gates */

#define HCLK_SFC		448