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Commit 1ddfe82d authored by Florian Fainelli's avatar Florian Fainelli Committed by Ralf Baechle
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[MIPS] RB532: Do not define registers that are already defined 



Use the register definitions of the MPMC controller from
mach-rc32434/rb.h instead of redefining them.

Signed-off-by: default avatarFlorian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a571444a

arch/mips/rb532/devices.c

+3 −13
Original line number Diff line number Diff line
@@ -49,8 +49,6 @@ 
#define GPIO_ALE (1 << 0x0a)

#define GPIO_CLE (1 << 0x0b)



extern char *board_type;



static struct resource korina_dev0_res[] = {

	{

		.name = "korina_regs",
@@ -265,14 +263,6 @@ static void __init parse_mac_addr(char *macstr) 
}





/* DEVICE CONTROLLER 1 */

#define CFG_DC_DEV1 	((void *)0xb8010010)

#define CFG_DC_DEV2 	((void *)0xb8010020)

#define CFG_DC_DEVBASE    0x0

#define CFG_DC_DEVMASK    0x4

#define CFG_DC_DEVC       0x8

#define CFG_DC_DEVTC      0xC



/* NAND definitions */

#define NAND_CHIP_DELAY	25
@@ -301,16 +291,16 @@ static void __init rb532_nand_setup(void) 
static int __init plat_setup_devices(void)

{

	/* Look for the CF card reader */

	if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK))

	if (!readl(IDT434_REG_BASE + DEV1MASK))

		rb532_devs[1] = NULL;

	else {

		cf_slot0_res[0].start =

		    readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);

		    readl(IDT434_REG_BASE + DEV1BASE);

		cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;

	}



	/* Read the NAND resources from the device controller */

	nand_slot0_res[0].start = readl(CFG_DC_DEV2 + CFG_DC_DEVBASE);

	nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);

	nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;



	/* Initialise the NAND device */