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Commit 1d966eb4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Ingo Molnar:
 "Misc fixes:

   - A rather involved set of memory hardware encryption fixes to
     support the early loading of microcode files via the initrd. These
     are larger than what we normally take at such a late -rc stage, but
     there are two mitigating factors: 1) much of the changes are
     limited to the SME code itself 2) being able to early load
     microcode has increased importance in the post-Meltdown/Spectre
     era.

   - An IRQ vector allocator fix

   - An Intel RDT driver use-after-free fix

   - An APIC driver bug fix/revert to make certain older systems boot
     again

   - A pkeys ABI fix

   - TSC calibration fixes

   - A kdump fix"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/apic/vector: Fix off by one in error path
  x86/intel_rdt/cqm: Prevent use after free
  x86/mm: Encrypt the initrd earlier for BSP microcode update
  x86/mm: Prepare sme_encrypt_kernel() for PAGE aligned encryption
  x86/mm: Centralize PMD flags in sme_encrypt_kernel()
  x86/mm: Use a struct to reduce parameters for SME PGD mapping
  x86/mm: Clean up register saving in the __enc_copy() assembly code
  x86/idt: Mark IDT tables __initconst
  Revert "x86/apic: Remove init_bsp_APIC()"
  x86/mm/pkeys: Fix fill_sig_info_pkey
  x86/tsc: Print tsc_khz, when it differs from cpu_khz
  x86/tsc: Fix erroneous TSC rate on Skylake Xeon
  x86/tsc: Future-proof native_calibrate_tsc()
  kdump: Write the correct address of mem_section into vmcoreinfo
parents 9a4ba2ab 45d55e7b

arch/x86/include/asm/apic.h

+1 −0
Original line number Diff line number Diff line
@@ -136,6 +136,7 @@ extern void disconnect_bsp_APIC(int virt_wire_setup); 
extern void disable_local_APIC(void);

extern void lapic_shutdown(void);

extern void sync_Arb_IDs(void);

extern void init_bsp_APIC(void);

extern void apic_intr_mode_init(void);

extern void setup_local_APIC(void);

extern void init_apic_mappings(void);

arch/x86/include/asm/mem_encrypt.h

+2 −2
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ void __init sme_unmap_bootdata(char *real_mode_data); 


void __init sme_early_init(void);



void __init sme_encrypt_kernel(void);

void __init sme_encrypt_kernel(struct boot_params *bp);

void __init sme_enable(struct boot_params *bp);



int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size);
@@ -67,7 +67,7 @@ static inline void __init sme_unmap_bootdata(char *real_mode_data) { } 


static inline void __init sme_early_init(void) { }



static inline void __init sme_encrypt_kernel(void) { }

static inline void __init sme_encrypt_kernel(struct boot_params *bp) { }

static inline void __init sme_enable(struct boot_params *bp) { }



static inline bool sme_active(void) { return false; }

arch/x86/kernel/apic/apic.c

+49 −0
Original line number Diff line number Diff line
@@ -1286,6 +1286,55 @@ static int __init apic_intr_mode_select(void) 
	return APIC_SYMMETRIC_IO;

}



/*

 * An initial setup of the virtual wire mode.

 */

void __init init_bsp_APIC(void)

{

	unsigned int value;



	/*

	 * Don't do the setup now if we have a SMP BIOS as the

	 * through-I/O-APIC virtual wire mode might be active.

	 */

	if (smp_found_config || !boot_cpu_has(X86_FEATURE_APIC))

		return;



	/*

	 * Do not trust the local APIC being empty at bootup.

	 */

	clear_local_APIC();



	/*

	 * Enable APIC.

	 */

	value = apic_read(APIC_SPIV);

	value &= ~APIC_VECTOR_MASK;

	value |= APIC_SPIV_APIC_ENABLED;



#ifdef CONFIG_X86_32

	/* This bit is reserved on P4/Xeon and should be cleared */

	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&

	    (boot_cpu_data.x86 == 15))

		value &= ~APIC_SPIV_FOCUS_DISABLED;

	else

#endif

		value |= APIC_SPIV_FOCUS_DISABLED;

	value |= SPURIOUS_APIC_VECTOR;

	apic_write(APIC_SPIV, value);



	/*

	 * Set up the virtual wire mode.

	 */

	apic_write(APIC_LVT0, APIC_DM_EXTINT);

	value = APIC_DM_NMI;

	if (!lapic_is_integrated())		/* 82489DX */

		value |= APIC_LVT_LEVEL_TRIGGER;

	if (apic_extnmi == APIC_EXTNMI_NONE)

		value |= APIC_LVT_MASKED;

	apic_write(APIC_LVT1, value);

}



/* Init the interrupt delivery mode for the BSP */

void __init apic_intr_mode_init(void)

{

arch/x86/kernel/apic/vector.c

+5 −2
Original line number Diff line number Diff line
@@ -542,14 +542,17 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, 


		err = assign_irq_vector_policy(irqd, info);

		trace_vector_setup(virq + i, false, err);

		if (err)

		if (err) {

			irqd->chip_data = NULL;

			free_apic_chip_data(apicd);

			goto error;

		}

	}



	return 0;



error:

	x86_vector_free_irqs(domain, virq, i + 1);

	x86_vector_free_irqs(domain, virq, i);

	return err;

}

arch/x86/kernel/cpu/intel_rdt.c

+4 −4
Original line number Diff line number Diff line
@@ -525,10 +525,6 @@ static void domain_remove_cpu(int cpu, struct rdt_resource *r) 
		 */

		if (static_branch_unlikely(&rdt_mon_enable_key))

			rmdir_mondata_subdir_allrdtgrp(r, d->id);

		kfree(d->ctrl_val);

		kfree(d->rmid_busy_llc);

		kfree(d->mbm_total);

		kfree(d->mbm_local);

		list_del(&d->list);

		if (is_mbm_enabled())

			cancel_delayed_work(&d->mbm_over);
@@ -545,6 +541,10 @@ static void domain_remove_cpu(int cpu, struct rdt_resource *r) 
			cancel_delayed_work(&d->cqm_limbo);

		}



		kfree(d->ctrl_val);

		kfree(d->rmid_busy_llc);

		kfree(d->mbm_total);

		kfree(d->mbm_local);

		kfree(d);

		return;

	}