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Commit 1bd12c91 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull one final 386 removal patch from Peter Anvin.

IRQ 13 FPU error handling is gone.  That was not one of the proudest
moments in PC history.

* 'x86/nuke386' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, 386 removal: Remove support for IRQ 13 FPU error reporting
parents 3dbff0d5 bc3eba60
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+1 −6
Original line number Diff line number Diff line
@@ -26,11 +26,6 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
#ifdef CONFIG_X86_32
static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
{
	/*
	 * We use exception 16 if we have hardware math and we've either seen
	 * it or the CPU claims it is internal
	 */
	int fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
	seq_printf(m,
		   "fdiv_bug\t: %s\n"
		   "hlt_bug\t\t: %s\n"
@@ -45,7 +40,7 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
		   c->f00f_bug ? "yes" : "no",
		   c->coma_bug ? "yes" : "no",
		   c->hard_math ? "yes" : "no",
		   fpu_exception ? "yes" : "no",
		   c->hard_math ? "yes" : "no",
		   c->cpuid_level,
		   c->wp_works_ok ? "yes" : "no");
}
+0 −40
Original line number Diff line number Diff line
@@ -42,39 +42,6 @@
 * (these are usually mapped into the 0x30-0xff vector range)
 */

#ifdef CONFIG_X86_32
/*
 * Note that on a 486, we don't want to do a SIGFPE on an irq13
 * as the irq is unreliable, and exception 16 works correctly
 * (ie as explained in the intel literature). On a 386, you
 * can't use exception 16 due to bad IBM design, so we have to
 * rely on the less exact irq13.
 *
 * Careful.. Not only is IRQ13 unreliable, but it is also
 * leads to races. IBM designers who came up with it should
 * be shot.
 */

static irqreturn_t math_error_irq(int cpl, void *dev_id)
{
	outb(0, 0xF0);
	if (ignore_fpu_irq || !boot_cpu_data.hard_math)
		return IRQ_NONE;
	math_error(get_irq_regs(), 0, X86_TRAP_MF);
	return IRQ_HANDLED;
}

/*
 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
 * so allow interrupt sharing.
 */
static struct irqaction fpu_irq = {
	.handler = math_error_irq,
	.name = "fpu",
	.flags = IRQF_NO_THREAD,
};
#endif

/*
 * IRQ2 is cascade interrupt to second interrupt controller
 */
@@ -242,13 +209,6 @@ void __init native_init_IRQ(void)
		setup_irq(2, &irq2);

#ifdef CONFIG_X86_32
	/*
	 * External FPU? Set up irq13 if so, for
	 * original braindamaged IBM FERR coupling.
	 */
	if (boot_cpu_data.hard_math && !cpu_has_fpu)
		setup_irq(FPU_IRQ, &fpu_irq);

	irq_ctx_init(smp_processor_id());
#endif
}
+0 −6
Original line number Diff line number Diff line
@@ -69,9 +69,6 @@

asmlinkage int system_call(void);

/* Do we ignore FPU interrupts ? */
char ignore_fpu_irq;

/*
 * The IDT has to be page-aligned to simplify the Pentium
 * F0 0F bug workaround.
@@ -564,9 +561,6 @@ void math_error(struct pt_regs *regs, int error_code, int trapnr)

dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
{
#ifdef CONFIG_X86_32
	ignore_fpu_irq = 1;
#endif
	exception_enter(regs);
	math_error(regs, error_code, X86_TRAP_MF);
	exception_exit(regs);