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Commit 1b2e8768 authored by David E. Box's avatar David E. Box Committed by Rafael J. Wysocki
Browse files

x86/intel_idle: add Gemini Lake support



Gemini Lake uses the same C-states as Broxton and also uses the
IRTL MSR's to determine maximum C-state latency.

Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Acked-by: default avatarLen Brown <len.brown@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent 41dc750e
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+2 −0
Original line number Diff line number Diff line
@@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
	ICPU(INTEL_FAM6_XEON_PHI_KNL,		idle_cpu_knl),
	ICPU(INTEL_FAM6_XEON_PHI_KNM,		idle_cpu_knl),
	ICPU(INTEL_FAM6_ATOM_GOLDMONT,		idle_cpu_bxt),
	ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE,	idle_cpu_bxt),
	ICPU(INTEL_FAM6_ATOM_DENVERTON,		idle_cpu_dnv),
	{}
};
@@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
		ivt_idle_state_table_update();
		break;
	case INTEL_FAM6_ATOM_GOLDMONT:
	case INTEL_FAM6_ATOM_GEMINI_LAKE:
		bxt_idle_state_table_update();
		break;
	case INTEL_FAM6_SKYLAKE_DESKTOP: