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Commit 1af998b2 authored by Lucas Stach's avatar Lucas Stach
Browse files

drm/etnaviv: switch MMU page tables to writecombine memory 



We are likely to write multiple page entries at once and already ensure
proper write buffer flushing before GPU submit, so this improves CPU
time usage in the submit path without any downsides.

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent a98b1e78

drivers/gpu/drm/etnaviv/etnaviv_iommu.c

+16 −18
Original line number Diff line number Diff line
@@ -47,9 +47,8 @@ static int __etnaviv_iommu_init(struct etnaviv_iommuv1_domain *etnaviv_domain) 
	u32 *p;

	int i;



	etnaviv_domain->base.bad_page_cpu = dma_alloc_coherent(

						etnaviv_domain->base.dev,

						SZ_4K,

	etnaviv_domain->base.bad_page_cpu =

			dma_alloc_wc(etnaviv_domain->base.dev, SZ_4K,

				     &etnaviv_domain->base.bad_page_dma,

				     GFP_KERNEL);

	if (!etnaviv_domain->base.bad_page_cpu)
@@ -59,12 +58,12 @@ static int __etnaviv_iommu_init(struct etnaviv_iommuv1_domain *etnaviv_domain) 
	for (i = 0; i < SZ_4K / 4; i++)

		*p++ = 0xdead55aa;



	etnaviv_domain->pgtable_cpu =

			dma_alloc_coherent(etnaviv_domain->base.dev, PT_SIZE,

	etnaviv_domain->pgtable_cpu = dma_alloc_wc(etnaviv_domain->base.dev,

						   PT_SIZE,

						   &etnaviv_domain->pgtable_dma,

						   GFP_KERNEL);

	if (!etnaviv_domain->pgtable_cpu) {

		dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

		dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

			    etnaviv_domain->base.bad_page_cpu,

			    etnaviv_domain->base.bad_page_dma);

		return -ENOMEM;
@@ -81,11 +80,10 @@ static void etnaviv_iommuv1_domain_free(struct etnaviv_iommu_domain *domain) 
	struct etnaviv_iommuv1_domain *etnaviv_domain =

			to_etnaviv_domain(domain);



	dma_free_coherent(etnaviv_domain->base.dev, PT_SIZE,

			  etnaviv_domain->pgtable_cpu,

			  etnaviv_domain->pgtable_dma);

	dma_free_wc(etnaviv_domain->base.dev, PT_SIZE,

		    etnaviv_domain->pgtable_cpu, etnaviv_domain->pgtable_dma);



	dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

	dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

		    etnaviv_domain->base.bad_page_cpu,

		    etnaviv_domain->base.bad_page_dma);

drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c

+33 −41
Original line number Diff line number Diff line
@@ -104,9 +104,8 @@ static int etnaviv_iommuv2_init(struct etnaviv_iommuv2_domain *etnaviv_domain) 
	int ret, i, j;



	/* allocate scratch page */

	etnaviv_domain->base.bad_page_cpu = dma_alloc_coherent(

						etnaviv_domain->base.dev,

						SZ_4K,

	etnaviv_domain->base.bad_page_cpu =

			dma_alloc_wc(etnaviv_domain->base.dev, SZ_4K,

				     &etnaviv_domain->base.bad_page_dma,

				     GFP_KERNEL);

	if (!etnaviv_domain->base.bad_page_cpu) {
@@ -117,18 +116,16 @@ static int etnaviv_iommuv2_init(struct etnaviv_iommuv2_domain *etnaviv_domain) 
	for (i = 0; i < SZ_4K / 4; i++)

		*p++ = 0xdead55aa;



	etnaviv_domain->pta_cpu = dma_alloc_coherent(etnaviv_domain->base.dev,

						     SZ_4K,

						     &etnaviv_domain->pta_dma,

	etnaviv_domain->pta_cpu = dma_alloc_wc(etnaviv_domain->base.dev,

					       SZ_4K, &etnaviv_domain->pta_dma,

					       GFP_KERNEL);

	if (!etnaviv_domain->pta_cpu) {

		ret = -ENOMEM;

		goto fail_mem;

	}



	etnaviv_domain->mtlb_cpu = dma_alloc_coherent(etnaviv_domain->base.dev,

						  SZ_4K,

						  &etnaviv_domain->mtlb_dma,

	etnaviv_domain->mtlb_cpu = dma_alloc_wc(etnaviv_domain->base.dev,

						SZ_4K, &etnaviv_domain->mtlb_dma,

						GFP_KERNEL);

	if (!etnaviv_domain->mtlb_cpu) {

		ret = -ENOMEM;
@@ -138,8 +135,7 @@ static int etnaviv_iommuv2_init(struct etnaviv_iommuv2_domain *etnaviv_domain) 
	/* pre-populate STLB pages (may want to switch to on-demand later) */

	for (i = 0; i < MMUv2_MAX_STLB_ENTRIES; i++) {

		etnaviv_domain->stlb_cpu[i] =

				dma_alloc_coherent(etnaviv_domain->base.dev,

						   SZ_4K,

				dma_alloc_wc(etnaviv_domain->base.dev, SZ_4K,

					     &etnaviv_domain->stlb_dma[i],

					     GFP_KERNEL);

		if (!etnaviv_domain->stlb_cpu[i]) {
@@ -158,23 +154,21 @@ static int etnaviv_iommuv2_init(struct etnaviv_iommuv2_domain *etnaviv_domain) 


fail_mem:

	if (etnaviv_domain->base.bad_page_cpu)

		dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

		dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

			    etnaviv_domain->base.bad_page_cpu,

			    etnaviv_domain->base.bad_page_dma);



	if (etnaviv_domain->pta_cpu)

		dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

				  etnaviv_domain->pta_cpu,

				  etnaviv_domain->pta_dma);

		dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

			    etnaviv_domain->pta_cpu, etnaviv_domain->pta_dma);



	if (etnaviv_domain->mtlb_cpu)

		dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

				  etnaviv_domain->mtlb_cpu,

				  etnaviv_domain->mtlb_dma);

		dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

			    etnaviv_domain->mtlb_cpu, etnaviv_domain->mtlb_dma);



	for (i = 0; i < MMUv2_MAX_STLB_ENTRIES; i++) {

		if (etnaviv_domain->stlb_cpu[i])

			dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

			dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

				    etnaviv_domain->stlb_cpu[i],

				    etnaviv_domain->stlb_dma[i]);

	}
@@ -188,21 +182,19 @@ static void etnaviv_iommuv2_domain_free(struct etnaviv_iommu_domain *domain) 
			to_etnaviv_domain(domain);

	int i;



	dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

	dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

		    etnaviv_domain->base.bad_page_cpu,

		    etnaviv_domain->base.bad_page_dma);



	dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

			  etnaviv_domain->pta_cpu,

			  etnaviv_domain->pta_dma);

	dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

		    etnaviv_domain->pta_cpu, etnaviv_domain->pta_dma);



	dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

			  etnaviv_domain->mtlb_cpu,

			  etnaviv_domain->mtlb_dma);

	dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

		    etnaviv_domain->mtlb_cpu, etnaviv_domain->mtlb_dma);



	for (i = 0; i < MMUv2_MAX_STLB_ENTRIES; i++) {

		if (etnaviv_domain->stlb_cpu[i])

			dma_free_coherent(etnaviv_domain->base.dev, SZ_4K,

			dma_free_wc(etnaviv_domain->base.dev, SZ_4K,

				    etnaviv_domain->stlb_cpu[i],

				    etnaviv_domain->stlb_dma[i]);

	}