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Commit 1af5d192 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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ARM: dts: sun9i: Add usb phy nodes to a80 dtsi 



On sun9i, there are 3 independent usb phys for EHCI/OHCI.
Add device nodes for them.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent bc8ffc2d

arch/arm/boot/dts/sun9i-a80.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -345,6 +345,43 @@ 
		 */

		ranges = <0 0 0 0x20000000>;



		usbphy1: phy@00a00800 {

			compatible = "allwinner,sun9i-a80-usb-phy";

			reg = <0x00a00800 0x4>;

			clocks = <&usb_phy_clk 1>;

			clock-names = "phy";

			resets = <&usb_phy_clk 17>;

			reset-names = "phy";

			status = "disabled";

			#phy-cells = <0>;

		};



		usbphy2: phy@00a01800 {

			compatible = "allwinner,sun9i-a80-usb-phy";

			reg = <0x00a01800 0x4>;

			clocks = <&usb_phy_clk 2>, <&usb_phy_clk 10>,

				 <&usb_phy_clk 3>;

			clock-names = "hsic_480M", "hsic_12M", "phy";

			resets = <&usb_phy_clk 18>, <&usb_phy_clk 19>;

			reset-names = "hsic", "phy";

			status = "disabled";

			#phy-cells = <0>;

			/* usb1 is always used with HSIC */

			phy_type = "hsic";

		};



		usbphy3: phy@00a02800 {

			compatible = "allwinner,sun9i-a80-usb-phy";

			reg = <0x00a02800 0x4>;

			clocks = <&usb_phy_clk 4>, <&usb_phy_clk 10>,

				 <&usb_phy_clk 5>;

			clock-names = "hsic_480M", "hsic_12M", "phy";

			resets = <&usb_phy_clk 20>, <&usb_phy_clk 21>;

			reset-names = "hsic", "phy";

			status = "disabled";

			#phy-cells = <0>;

		};



		mmc0: mmc@01c0f000 {

			compatible = "allwinner,sun5i-a13-mmc";

			reg = <0x01c0f000 0x1000>;