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Commit 1abb5fbc authored by David Collins's avatar David Collins
Browse files

clk: qcom: clk-alpha-pll: add support for custom register initialization 



Add support for configuring custom target-specific registers
during PLL initialization.

Change-Id: Id296ae904d1b74e7c2f90027bd557bdc62b1d362
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 9812e86a

drivers/clk/qcom/clk-alpha-pll.c

+13 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Copyright (c) 2015, 2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved.

 */



#include <linux/kernel.h>
@@ -1499,6 +1499,16 @@ static int lucid_pll_is_enabled(struct clk_alpha_pll *pll, 
		(mode_regval & PLL_OUTCTRL));

}



static void clk_alpha_pll_custom_configure(struct clk_alpha_pll *pll,

		struct regmap *regmap, const struct alpha_pll_config *config)

{

	int i;



	for (i = 0; i < config->num_custom_reg; i++)

		regmap_write(regmap, pll->offset + config->custom_reg_offset[i],

				config->custom_reg_val[i]);

}



void clk_lucid_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

				const struct alpha_pll_config *config)

{
@@ -1548,6 +1558,8 @@ void clk_lucid_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
		regmap_write(regmap, PLL_TEST_CTL_U1(pll),

				config->test_ctl_hi1_val);



	clk_alpha_pll_custom_configure(pll, regmap, config);



	regmap_update_bits(regmap, PLL_MODE(pll),

				 PLL_UPDATE_BYPASS,

				 PLL_UPDATE_BYPASS);

drivers/clk/qcom/clk-alpha-pll.h

+4 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/* Copyright (c) 2015, 2018, The Linux Foundation. All rights reserved. */

/* Copyright (c) 2015, 2018-2019, The Linux Foundation. All rights reserved. */



#ifndef __QCOM_CLK_ALPHA_PLL_H__

#define __QCOM_CLK_ALPHA_PLL_H__
@@ -114,6 +114,9 @@ struct alpha_pll_config { 
	u32 post_div_mask;

	u32 vco_val;

	u32 vco_mask;

	const u32 *custom_reg_offset;

	const u32 *custom_reg_val;

	size_t num_custom_reg;

};



extern const struct clk_ops clk_alpha_pll_ops;