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Commit 1a9fa190 authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo
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ARM: imx6: correct i.MX6 PCIe interrupt routing 



The PCIe interrupts are also routed through the GPC. This has been
missed from the conversion to stacked IRQ domains as the PCIe
controller uses an explicit interrupt map and thus doesn't inherit
the SoC global interrupt parent.

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Cc: <stable@vger.kernel.org> # 4.1
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e053f96b

arch/arm/boot/dts/imx6qdl.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -181,10 +181,10 @@ 
			interrupt-names = "msi";

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0x7>;

			interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

			                <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,

				 <&clks IMX6QDL_CLK_LVDS1_GATE>,

				 <&clks IMX6QDL_CLK_PCIE_REF_125M>;