[ARM] 3142/1: OMAP 2/5: Update files common to omap1 and omap2 (1a8bfa1e) · Commits · e / devices / android_kernel_oneplus_sm7250

arch/arm/plat-omap/Makefile

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		@@ -3,7 +3,7 @@
		#

		# Common support
		obj-y := common.o sram.o sram-fn.o clock.o dma.o mux.o gpio.o mcbsp.o usb.o
		obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o
		obj-m :=
		obj-n :=
		obj- :=

arch/arm/plat-omap/clock.c

+140 −1175

File changed.

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arch/arm/plat-omap/clock.h

deleted100644 → 0

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		/*
		* linux/arch/arm/plat-omap/clock.h
		*
		* Copyright (C) 2004 Nokia corporation
		* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
		* Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		#ifndef __ARCH_ARM_OMAP_CLOCK_H
		#define __ARCH_ARM_OMAP_CLOCK_H

		struct module;

		struct clk {
		struct list_head node;
		struct module *owner;
		const char *name;
		struct clk *parent;
		unsigned long rate;
		__s8 usecount;
		__u16 flags;
		__u32 enable_reg;
		__u8 enable_bit;
		__u8 rate_offset;
		void (recalc)(struct clk );
		int (set_rate)(struct clk , unsigned long);
		long (round_rate)(struct clk , unsigned long);
		void (init)(struct clk );
		};


		struct mpu_rate {
		unsigned long rate;
		unsigned long xtal;
		unsigned long pll_rate;
		__u16 ckctl_val;
		__u16 dpllctl_val;
		};


		/* Clock flags */
		#define RATE_CKCTL 1
		#define RATE_FIXED 2
		#define RATE_PROPAGATES 4
		#define VIRTUAL_CLOCK 8
		#define ALWAYS_ENABLED 16
		#define ENABLE_REG_32BIT 32
		#define CLOCK_IN_OMAP16XX 64
		#define CLOCK_IN_OMAP1510 128
		#define CLOCK_IN_OMAP730 256
		#define DSP_DOMAIN_CLOCK 512
		#define VIRTUAL_IO_ADDRESS 1024

		/* ARM_CKCTL bit shifts */
		#define CKCTL_PERDIV_OFFSET 0
		#define CKCTL_LCDDIV_OFFSET 2
		#define CKCTL_ARMDIV_OFFSET 4
		#define CKCTL_DSPDIV_OFFSET 6
		#define CKCTL_TCDIV_OFFSET 8
		#define CKCTL_DSPMMUDIV_OFFSET 10
		/#define ARM_TIMXO 12/
		#define EN_DSPCK 13
		/#define ARM_INTHCK_SEL 14/ /* Divide-by-2 for mpu inth_ck */
		/* DSP_CKCTL bit shifts */
		#define CKCTL_DSPPERDIV_OFFSET 0

		/* ARM_IDLECT1 bit shifts */
		/#define IDLWDT_ARM 0/
		/#define IDLXORP_ARM 1/
		/#define IDLPER_ARM 2/
		/#define IDLLCD_ARM 3/
		/#define IDLLB_ARM 4/
		/#define IDLHSAB_ARM 5/
		/#define IDLIF_ARM 6/
		/#define IDLDPLL_ARM 7/
		/#define IDLAPI_ARM 8/
		/#define IDLTIM_ARM 9/
		/#define SETARM_IDLE 11/

		/* ARM_IDLECT2 bit shifts */
		#define EN_WDTCK 0
		#define EN_XORPCK 1
		#define EN_PERCK 2
		#define EN_LCDCK 3
		#define EN_LBCK 4 /* Not on 1610/1710 */
		/#define EN_HSABCK 5/
		#define EN_APICK 6
		#define EN_TIMCK 7
		#define DMACK_REQ 8
		#define EN_GPIOCK 9 /* Not on 1610/1710 */
		/#define EN_LBFREECK 10/
		#define EN_CKOUT_ARM 11

		/* ARM_IDLECT3 bit shifts */
		#define EN_OCPI_CK 0
		#define EN_TC1_CK 2
		#define EN_TC2_CK 4

		/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
		#define EN_DSPTIMCK 5

		/* Various register defines for clock controls scattered around OMAP chip */
		#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
		#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
		#define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
		#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
		#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
		#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
		#define SOFT_REQ_REG 0xfffe0834
		#define SOFT_REQ_REG2 0xfffe0880

		int clk_register(struct clk *clk);
		void clk_unregister(struct clk *clk);
		int clk_init(void);

		#endif

arch/arm/plat-omap/common.c

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		@@ -31,7 +31,7 @@
		#include <asm/arch/mux.h>
		#include <asm/arch/fpga.h>

		#include "clock.h"
		#include <asm/arch/clock.h>

		#define NO_LENGTH_CHECK 0xffffffff

		@@ -117,19 +117,43 @@ EXPORT_SYMBOL(omap_get_var_config);

		static int __init omap_add_serial_console(void)
		{
		const struct omap_serial_console_config *info;
		const struct omap_serial_console_config *con_info;
		const struct omap_uart_config *uart_info;
		static char speed[11], *opt = NULL;
		int line, i, uart_idx;

		info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
		uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
		con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
		struct omap_serial_console_config);
		if (info != NULL && info->console_uart) {
		static char speed[11], *opt = NULL;
		if (uart_info == NULL \|\| con_info == NULL)
		return 0;

		if (con_info->console_uart == 0)
		return 0;

		if (info->console_speed) {
		snprintf(speed, sizeof(speed), "%u", info->console_speed);
		if (con_info->console_speed) {
		snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
		opt = speed;
		}
		return add_preferred_console("ttyS", info->console_uart - 1, opt);
		}

		uart_idx = con_info->console_uart - 1;
		if (uart_idx >= OMAP_MAX_NR_PORTS) {
		printk(KERN_INFO "Console: external UART#%d. "
		"Not adding it as console this time.\n",
		uart_idx + 1);
		return 0;
		}
		if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
		printk(KERN_ERR "Console: Selected UART#%d is "
		"not enabled for this platform\n",
		uart_idx + 1);
		return -1;
		}
		line = 0;
		for (i = 0; i < uart_idx; i++) {
		if (uart_info->enabled_uarts & (1 << i))
		line++;
		}
		return add_preferred_console("ttyS", line, opt);
		}
		console_initcall(omap_add_serial_console);

arch/arm/plat-omap/devices.c

0 → 100644

+381 −0

Original line number	Diff line number	Diff line
		/*
		* linux/arch/arm/plat-omap/devices.c
		*
		* Common platform device setup/initialization for OMAP1 and OMAP2
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License as published by
		* the Free Software Foundation; either version 2 of the License, or
		* (at your option) any later version.
		*/

		#include <linux/config.h>
		#include <linux/module.h>
		#include <linux/kernel.h>
		#include <linux/init.h>
		#include <linux/platform_device.h>

		#include <asm/hardware.h>
		#include <asm/io.h>
		#include <asm/mach-types.h>
		#include <asm/mach/map.h>

		#include <asm/arch/tc.h>
		#include <asm/arch/board.h>
		#include <asm/arch/mux.h>
		#include <asm/arch/gpio.h>


		void omap_nop_release(struct device *dev)
		{
		/* Nothing */
		}

		/-------------------------------------------------------------------------/

		#if defined(CONFIG_I2C_OMAP) \|\| defined(CONFIG_I2C_OMAP_MODULE)

		#define OMAP1_I2C_BASE 0xfffb3800
		#define OMAP2_I2C_BASE1 0x48070000
		#define OMAP_I2C_SIZE 0x3f
		#define OMAP1_I2C_INT INT_I2C
		#define OMAP2_I2C_INT1 56

		static struct resource i2c_resources1[] = {
		{
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_MEM,
		},
		{
		.start = 0,
		.flags = IORESOURCE_IRQ,
		},
		};

		/* DMA not used; works around erratum writing to non-empty i2c fifo */

		static struct platform_device omap_i2c_device1 = {
		.name = "i2c_omap",
		.id = 1,
		.dev = {
		.release = omap_nop_release,
		},
		.num_resources = ARRAY_SIZE(i2c_resources1),
		.resource = i2c_resources1,
		};

		/* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
		static void omap_init_i2c(void)
		{
		if (cpu_is_omap24xx()) {
		i2c_resources1[0].start = OMAP2_I2C_BASE1;
		i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
		i2c_resources1[1].start = OMAP2_I2C_INT1;
		} else {
		i2c_resources1[0].start = OMAP1_I2C_BASE;
		i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
		i2c_resources1[1].start = OMAP1_I2C_INT;
		}

		/* FIXME define and use a boot tag, in case of boards that
		* either don't wire up I2C, or chips that mux it differently...
		* it can include clocking and address info, maybe more.
		*/
		if (cpu_is_omap24xx()) {
		omap_cfg_reg(M19_24XX_I2C1_SCL);
		omap_cfg_reg(L15_24XX_I2C1_SDA);
		} else {
		omap_cfg_reg(I2C_SCL);
		omap_cfg_reg(I2C_SDA);
		}

		(void) platform_device_register(&omap_i2c_device1);
		}

		#else
		static inline void omap_init_i2c(void) {}
		#endif

		/-------------------------------------------------------------------------/

		#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE)

		#ifdef CONFIG_ARCH_OMAP24XX
		#define OMAP_MMC1_BASE 0x4809c000
		#define OMAP_MMC1_INT 83
		#else
		#define OMAP_MMC1_BASE 0xfffb7800
		#define OMAP_MMC1_INT INT_MMC
		#endif
		#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */

		static struct omap_mmc_conf mmc1_conf;

		static u64 mmc1_dmamask = 0xffffffff;

		static struct resource mmc1_resources[] = {
		{
		.start = IO_ADDRESS(OMAP_MMC1_BASE),
		.end = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
		.flags = IORESOURCE_MEM,
		},
		{
		.start = OMAP_MMC1_INT,
		.flags = IORESOURCE_IRQ,
		},
		};

		static struct platform_device mmc_omap_device1 = {
		.name = "mmci-omap",
		.id = 1,
		.dev = {
		.release = omap_nop_release,
		.dma_mask = &mmc1_dmamask,
		.platform_data = &mmc1_conf,
		},
		.num_resources = ARRAY_SIZE(mmc1_resources),
		.resource = mmc1_resources,
		};

		#ifdef CONFIG_ARCH_OMAP16XX

		static struct omap_mmc_conf mmc2_conf;

		static u64 mmc2_dmamask = 0xffffffff;

		static struct resource mmc2_resources[] = {
		{
		.start = IO_ADDRESS(OMAP_MMC2_BASE),
		.end = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
		.flags = IORESOURCE_MEM,
		},
		{
		.start = INT_1610_MMC2,
		.flags = IORESOURCE_IRQ,
		},
		};

		static struct platform_device mmc_omap_device2 = {
		.name = "mmci-omap",
		.id = 2,
		.dev = {
		.release = omap_nop_release,
		.dma_mask = &mmc2_dmamask,
		.platform_data = &mmc2_conf,
		},
		.num_resources = ARRAY_SIZE(mmc2_resources),
		.resource = mmc2_resources,
		};
		#endif

		static void __init omap_init_mmc(void)
		{
		const struct omap_mmc_config *mmc_conf;
		const struct omap_mmc_conf *mmc;

		/* NOTE: assumes MMC was never (wrongly) enabled */
		mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
		if (!mmc_conf)
		return;

		/* block 1 is always available and has just one pinout option */
		mmc = &mmc_conf->mmc[0];
		if (mmc->enabled) {
		if (!cpu_is_omap24xx()) {
		omap_cfg_reg(MMC_CMD);
		omap_cfg_reg(MMC_CLK);
		omap_cfg_reg(MMC_DAT0);
		if (cpu_is_omap1710()) {
		omap_cfg_reg(M15_1710_MMC_CLKI);
		omap_cfg_reg(P19_1710_MMC_CMDDIR);
		omap_cfg_reg(P20_1710_MMC_DATDIR0);
		}
		}
		if (mmc->wire4) {
		if (!cpu_is_omap24xx()) {
		omap_cfg_reg(MMC_DAT1);
		/* NOTE: DAT2 can be on W10 (here) or M15 */
		if (!mmc->nomux)
		omap_cfg_reg(MMC_DAT2);
		omap_cfg_reg(MMC_DAT3);
		}
		}
		mmc1_conf = *mmc;
		(void) platform_device_register(&mmc_omap_device1);
		}

		#ifdef CONFIG_ARCH_OMAP16XX
		/* block 2 is on newer chips, and has many pinout options */
		mmc = &mmc_conf->mmc[1];
		if (mmc->enabled) {
		if (!mmc->nomux) {
		omap_cfg_reg(Y8_1610_MMC2_CMD);
		omap_cfg_reg(Y10_1610_MMC2_CLK);
		omap_cfg_reg(R18_1610_MMC2_CLKIN);
		omap_cfg_reg(W8_1610_MMC2_DAT0);
		if (mmc->wire4) {
		omap_cfg_reg(V8_1610_MMC2_DAT1);
		omap_cfg_reg(W15_1610_MMC2_DAT2);
		omap_cfg_reg(R10_1610_MMC2_DAT3);
		}

		/* These are needed for the level shifter */
		omap_cfg_reg(V9_1610_MMC2_CMDDIR);
		omap_cfg_reg(V5_1610_MMC2_DATDIR0);
		omap_cfg_reg(W19_1610_MMC2_DATDIR1);
		}

		/* Feedback clock must be set on OMAP-1710 MMC2 */
		if (cpu_is_omap1710())
		omap_writel(omap_readl(MOD_CONF_CTRL_1) \| (1 << 24),
		MOD_CONF_CTRL_1);
		mmc2_conf = *mmc;
		(void) platform_device_register(&mmc_omap_device2);
		}
		#endif
		return;
		}
		#else
		static inline void omap_init_mmc(void) {}
		#endif

		#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)

		#ifdef CONFIG_ARCH_OMAP24XX
		#define OMAP_WDT_BASE 0x48022000
		#else
		#define OMAP_WDT_BASE 0xfffeb000
		#endif

		static struct resource wdt_resources[] = {
		{
		.start = OMAP_WDT_BASE,
		.end = OMAP_WDT_BASE + 0x4f,
		.flags = IORESOURCE_MEM,
		},
		};

		static struct platform_device omap_wdt_device = {
		.name = "omap_wdt",
		.id = -1,
		.dev = {
		.release = omap_nop_release,
		},
		.num_resources = ARRAY_SIZE(wdt_resources),
		.resource = wdt_resources,
		};

		static void omap_init_wdt(void)
		{
		(void) platform_device_register(&omap_wdt_device);
		}
		#else
		static inline void omap_init_wdt(void) {}
		#endif

		/-------------------------------------------------------------------------/

		#if defined(CONFIG_OMAP_RNG) \|\| defined(CONFIG_OMAP_RNG_MODULE)

		#ifdef CONFIG_ARCH_OMAP24XX
		#define OMAP_RNG_BASE 0x480A0000
		#else
		#define OMAP_RNG_BASE 0xfffe5000
		#endif

		static struct resource rng_resources[] = {
		{
		.start = OMAP_RNG_BASE,
		.end = OMAP_RNG_BASE + 0x4f,
		.flags = IORESOURCE_MEM,
		},
		};

		static struct platform_device omap_rng_device = {
		.name = "omap_rng",
		.id = -1,
		.dev = {
		.release = omap_nop_release,
		},
		.num_resources = ARRAY_SIZE(rng_resources),
		.resource = rng_resources,
		};

		static void omap_init_rng(void)
		{
		(void) platform_device_register(&omap_rng_device);
		}
		#else
		static inline void omap_init_rng(void) {}
		#endif

		#if defined(CONFIG_FB_OMAP) \|\| defined(CONFIG_FB_OMAP_MODULE)

		static struct omap_lcd_config omap_fb_conf;

		static u64 omap_fb_dma_mask = ~(u32)0;

		static struct platform_device omap_fb_device = {
		.name = "omapfb",
		.id = -1,
		.dev = {
		.release = omap_nop_release,
		.dma_mask = &omap_fb_dma_mask,
		.coherent_dma_mask = ~(u32)0,
		.platform_data = &omap_fb_conf,
		},
		.num_resources = 0,
		};

		static inline void omap_init_fb(void)
		{
		const struct omap_lcd_config *conf;

		conf = omap_get_config(OMAP_TAG_LCD, struct omap_lcd_config);
		if (conf != NULL)
		omap_fb_conf = *conf;
		platform_device_register(&omap_fb_device);
		}

		#else

		static inline void omap_init_fb(void) {}

		#endif

		/*
		* This gets called after board-specific INIT_MACHINE, and initializes most
		* on-chip peripherals accessible on this board (except for few like USB):
		*
		* (a) Does any "standard config" pin muxing needed. Board-specific
		* code will have muxed GPIO pins and done "nonstandard" setup;
		* that code could live in the boot loader.
		* (b) Populating board-specific platform_data with the data drivers
		* rely on to handle wiring variations.
		* (c) Creating platform devices as meaningful on this board and
		* with this kernel configuration.
		*
		* Claiming GPIOs, and setting their direction and initial values, is the
		* responsibility of the device drivers. So is responding to probe().
		*
		* Board-specific knowlege like creating devices or pin setup is to be
		* kept out of drivers as much as possible. In particular, pin setup
		* may be handled by the boot loader, and drivers should expect it will
		* normally have been done by the time they're probed.
		*/
		static int __init omap_init_devices(void)
		{
		/* please keep these calls, and their implementations above,
		* in alphabetical order so they're easier to sort through.
		*/
		omap_init_fb();
		omap_init_i2c();
		omap_init_mmc();
		omap_init_wdt();
		omap_init_rng();

		return 0;
		}
		arch_initcall(omap_init_devices);