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Commit 1a5700bc authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux into next

Pull clock framework updates from Mike Turquette:
 "The clock framework changes for 3.16 are pretty typical: mostly clock
  driver additions and fixes.  There are additions to the clock core
  code for some of the basic types (e.g. the common divider type has
  some fixes and featured added to it).

  One minor annoyance is a last-minute dependency that wasn't handled
  quite right.  Commit ba0fae3b ("clk: berlin: add core clock driver
  for BG2/BG2CD") in this pull request depends on
  include/dt-bindings/clock/berlin2.h, which is already in your tree via
  the arm-soc pull request.  Building for the berlin platform will break
  when the clk tree is built on it's own, but merged into your master
  branch everything should be fine"

* tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux: (75 commits)
  mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
  clk: export __clk_round_rate for providers
  clk: versatile: free icst on error return
  clk: qcom: Return error pointers for unimplemented clocks
  clk: qcom: Support msm8974pro global clock control hardware
  clk: qcom: Properly support display clocks on msm8974
  clk: qcom: Support display RCG clocks
  clk: qcom: Return highest rate when round_rate() exceeds plan
  clk: qcom: Fix mmcc-8974's PLL configurations
  clk: qcom: Fix clk_rcg2_is_enabled() check
  clk: berlin: add core clock driver for BG2Q
  clk: berlin: add core clock driver for BG2/BG2CD
  clk: berlin: add driver for BG2x complex divider cells
  clk: berlin: add driver for BG2x simple PLLs
  clk: berlin: add driver for BG2x audio/video PLL
  clk: st: Terminate of match table
  clk/exynos4: Fix compilation warning
  ARM: shmobile: r8a7779: Add clock index macros for DT sources
  clk: divider: Fix overflow in clk_divider_bestdiv
  clk: u300: Terminate of match table
  ...
parents a68a7509 3cbcb160
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+11 −5
Original line number Diff line number Diff line
@@ -68,21 +68,27 @@ the operations defined in clk.h:
		int		(*is_enabled)(struct clk_hw *hw);
		unsigned long	(*recalc_rate)(struct clk_hw *hw,
						unsigned long parent_rate);
		long		(*round_rate)(struct clk_hw *hw, unsigned long,
						unsigned long *);
		long		(*round_rate)(struct clk_hw *hw,
						unsigned long rate,
						unsigned long *parent_rate);
		long		(*determine_rate)(struct clk_hw *hw,
						unsigned long rate,
						unsigned long *best_parent_rate,
						struct clk **best_parent_clk);
		int		(*set_parent)(struct clk_hw *hw, u8 index);
		u8		(*get_parent)(struct clk_hw *hw);
		int		(*set_rate)(struct clk_hw *hw, unsigned long);
		int		(*set_rate)(struct clk_hw *hw,
					    unsigned long rate,
					    unsigned long parent_rate);
		int		(*set_rate_and_parent)(struct clk_hw *hw,
					    unsigned long rate,
					    unsigned long parent_rate, u8 index);
					    unsigned long parent_rate,
					    u8 index);
		unsigned long	(*recalc_accuracy)(struct clk_hw *hw,
						unsigned long parent_accuracy);
		void		(*init)(struct clk_hw *hw);
		int		(*debug_init)(struct clk_hw *hw,
					      struct dentry *dentry);
	};

	Part 3 - hardware clk implementations
+81 −35
Original line number Diff line number Diff line
@@ -10,12 +10,12 @@ This binding uses the common clock binding:

Required properties:
- compatible
	Shall have one of the following values:
	- "brcm,bcm11351-root-ccu"
	- "brcm,bcm11351-aon-ccu"
	- "brcm,bcm11351-hub-ccu"
	- "brcm,bcm11351-master-ccu"
	- "brcm,bcm11351-slave-ccu"
	Shall have a value of the form "brcm,<model>-<which>-ccu",
	where <model> is a Broadcom SoC model number and <which> is
	the name of a defined CCU.  For example:
	    "brcm,bcm11351-root-ccu"
	The compatible strings used for each supported SoC family
	are defined below.
- reg
	Shall define the base and range of the address space
	containing clock control registers
@@ -26,12 +26,48 @@ Required properties:
	Shall be an ordered list of strings defining the names of
	the clocks provided by the CCU.

Device tree example:

	slave_ccu: slave_ccu {
		compatible = "brcm,bcm11351-slave-ccu";
		reg = <0x3e011000 0x0f00>;
		#clock-cells = <1>;
		clock-output-names = "uartb",
				     "uartb2",
				     "uartb3",
				     "uartb4";
	};

	ref_crystal_clk: ref_crystal {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

BCM281XX family
---------------
CCU compatible string values for SoCs in the BCM281XX family are:
    "brcm,bcm11351-root-ccu"
    "brcm,bcm11351-aon-ccu"
    "brcm,bcm11351-hub-ccu"
    "brcm,bcm11351-master-ccu"
    "brcm,bcm11351-slave-ccu"

BCM281XX family SoCs use Kona CCUs.  The following table defines
the set of CCUs and clock specifiers for BCM281XX clocks.  When
a clock consumer references a clocks, its symbolic specifier
(rather than its numeric index value) should be used.  These
specifiers are defined in "include/dt-bindings/clock/bcm281xx.h".
The following table defines the set of CCUs and clock specifiers for
BCM281XX family clocks.  When a clock consumer references a clocks,
its symbolic specifier (rather than its numeric index value) should
be used.  These specifiers are defined in:
    "include/dt-bindings/clock/bcm281xx.h"

    CCU     Clock           Type    Index   Specifier
    ---     -----           ----    -----   ---------
@@ -64,30 +100,40 @@ specifiers are defined in "include/dt-bindings/clock/bcm281xx.h".
    slave   pwm             peri      9     BCM281XX_SLAVE_CCU_PWM


Device tree example:
BCM21664 family
---------------
CCU compatible string values for SoCs in the BCM21664 family are:
    "brcm,bcm21664-root-ccu"
    "brcm,bcm21664-aon-ccu"
    "brcm,bcm21664-master-ccu"
    "brcm,bcm21664-slave-ccu"

	slave_ccu: slave_ccu {
		compatible = "brcm,bcm11351-slave-ccu";
		reg = <0x3e011000 0x0f00>;
		#clock-cells = <1>;
		clock-output-names = "uartb",
				     "uartb2",
				     "uartb3",
				     "uartb4";
	};
The following table defines the set of CCUs and clock specifiers for
BCM21664 family clocks.  When a clock consumer references a clocks,
its symbolic specifier (rather than its numeric index value) should
be used.  These specifiers are defined in:
    "include/dt-bindings/clock/bcm21664.h"

	ref_crystal_clk: ref_crystal {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <26000000>;
	};
    CCU     Clock           Type    Index   Specifier
    ---     -----           ----    -----   ---------
    root    frac_1m         peri      0     BCM21664_ROOT_CCU_FRAC_1M

	uart@3e002000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};
    aon     hub_timer       peri      0     BCM21664_AON_CCU_HUB_TIMER

    master  sdio1           peri      0     BCM21664_MASTER_CCU_SDIO1
    master  sdio2           peri      1     BCM21664_MASTER_CCU_SDIO2
    master  sdio3           peri      2     BCM21664_MASTER_CCU_SDIO3
    master  sdio4           peri      3     BCM21664_MASTER_CCU_SDIO4
    master  sdio1_sleep     peri      4     BCM21664_MASTER_CCU_SDIO1_SLEEP
    master  sdio2_sleep     peri      5     BCM21664_MASTER_CCU_SDIO2_SLEEP
    master  sdio3_sleep     peri      6     BCM21664_MASTER_CCU_SDIO3_SLEEP
    master  sdio4_sleep     peri      7     BCM21664_MASTER_CCU_SDIO4_SLEEP

    slave   uartb           peri      0     BCM21664_SLAVE_CCU_UARTB
    slave   uartb2          peri      1     BCM21664_SLAVE_CCU_UARTB2
    slave   uartb3          peri      2     BCM21664_SLAVE_CCU_UARTB3
    slave   uartb4          peri      3     BCM21664_SLAVE_CCU_UARTB4
    slave   bsc1            peri      4     BCM21664_SLAVE_CCU_BSC1
    slave   bsc2            peri      5     BCM21664_SLAVE_CCU_BSC2
    slave   bsc3            peri      6     BCM21664_SLAVE_CCU_BSC3
    slave   bsc4            peri      7     BCM21664_SLAVE_CCU_BSC4
+4 −5
Original line number Diff line number Diff line
@@ -44,10 +44,9 @@ For example:
  clocks by index. The names should reflect the clock output signal
  names for the device.

clock-indices:	   If the identifyng number for the clocks in the node
		   is not linear from zero, then the this mapping allows
		   the mapping of identifiers into the clock-output-names
		   array.
clock-indices:	   If the identifying number for the clocks in the node
		   is not linear from zero, then this allows the mapping of
		   identifiers into the clock-output-names array.

For example, if we have two clocks <&oscillator 1> and <&oscillator 3>:

@@ -58,7 +57,7 @@ For example, if we have two clocks <&oscillator 1> and <&oscillator 3>:
		clock-output-names = "clka", "clkb";
	}

	This ensures we do not have any empty nodes in clock-output-names
	This ensures we do not have any empty strings in clock-output-names


==Clock consumers==
+0 −1
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ Required properties:
Optional properties:
- clock-accuracy : accuracy of clock in ppb (parts per billion).
		   Should be a single cell.
- gpios : From common gpio binding; gpio connection to clock enable pin.
- clock-output-names : From common clock binding.

Example:
+31 −0
Original line number Diff line number Diff line
* Hisilicon Hix5hd2 Clock Controller

The hix5hd2 clock controller generates and supplies clock to various
controllers within the hix5hd2 SoC.

Required Properties:

- compatible: should be "hisilicon,hix5hd2-clock"
- reg: Address and length of the register set
- #clock-cells: Should be <1>

Each clock is assigned an identifier and client nodes use this identifier
to specify the clock which they consume.

All these identifier could be found in <dt-bindings/clock/hix5hd2-clock.h>.

Examples:
	clock: clock@f8a22000 {
		compatible = "hisilicon,hix5hd2-clock";
		reg = <0xf8a22000 0x1000>;
		#clock-cells = <1>;
	};

	uart0: uart@f8b00000 {
		compatible = "arm,pl011", "arm,primecell";
		reg = <0xf8b00000 0x1000>;
		interrupts = <0 49 4>;
		clocks = <&clock HIX5HD2_FIXED_83M>;
		clock-names = "apb_pclk";
		status = "disabled";
	};
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