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Commit 1a1de2cf authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: clk-alpha-pll: add additional configuration support for PLLs"

parents 803f8d29 58acaef1

drivers/clk/qcom/clk-alpha-pll.c

+27 −4
Original line number Diff line number Diff line
@@ -1213,6 +1213,9 @@ int alpha_pll_lucid_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
	if (config->l)

		regmap_write(regmap, PLL_L_VAL(pll), config->l);



	if (config->cal_l)

		regmap_write(regmap, PLL_CAL_L_VAL(pll), config->cal_l);

	else

		regmap_write(regmap, PLL_CAL_L_VAL(pll), LUCID_PLL_CAL_VAL);



	if (config->alpha)
@@ -1229,9 +1232,29 @@ int alpha_pll_lucid_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
		regmap_write(regmap, PLL_CONFIG_CTL_U1(pll),

				config->config_ctl_hi1_val);



	if (config->post_div_mask)

		regmap_update_bits(regmap, PLL_USER_CTL(pll),

			config->post_div_mask, config->post_div_val);

	if (config->user_ctl_val)

		regmap_write(regmap, PLL_USER_CTL(pll),

				config->user_ctl_val);



	if (config->user_ctl_hi_val)

		regmap_write(regmap, PLL_USER_CTL_U(pll),

				config->user_ctl_hi_val);



	if (config->user_ctl_hi1_val)

		regmap_write(regmap, PLL_USER_CTL_U1(pll),

				config->user_ctl_hi1_val);



	if (config->test_ctl_val)

		regmap_write(regmap, PLL_TEST_CTL(pll),

				config->test_ctl_val);



	if (config->test_ctl_hi_val)

		regmap_write(regmap, PLL_TEST_CTL_U(pll),

				config->test_ctl_hi_val);



	if (config->test_ctl_hi1_val)

		regmap_write(regmap, PLL_TEST_CTL_U1(pll),

				config->test_ctl_hi1_val);



	regmap_update_bits(regmap, PLL_MODE(pll),

				 PLL_UPDATE_BYPASS,

drivers/clk/qcom/clk-alpha-pll.h

+7 −0
Original line number Diff line number Diff line
@@ -93,11 +93,18 @@ struct clk_alpha_pll_postdiv { 


struct alpha_pll_config {

	u32 l;

	u32 cal_l;

	u32 alpha;

	u32 alpha_hi;

	u32 user_ctl_val;

	u32 user_ctl_hi_val;

	u32 user_ctl_hi1_val;

	u32 config_ctl_val;

	u32 config_ctl_hi_val;

	u32 config_ctl_hi1_val;

	u32 test_ctl_val;

	u32 test_ctl_hi_val;

	u32 test_ctl_hi1_val;

	u32 main_output_mask;

	u32 aux_output_mask;

	u32 aux2_output_mask;