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Commit 1949f9f4 authored by Tony Luck's avatar Tony Luck Committed by Thomas Gleixner
Browse files

Documentation/l1tf: Fix typos 



Fix spelling and other typos

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 288d152c

Documentation/admin-guide/l1tf.rst

+7 −7
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ vulnerability is not present on: 
   - Older processor models, where the CPU family is < 6



   - A range of Intel ATOM processors (Cedarview, Cloverview, Lincroft,

     Penwell, Pineview, Slivermont, Airmont, Merrifield)

     Penwell, Pineview, Silvermont, Airmont, Merrifield)



   - The Intel Core Duo Yonah variants (2006 - 2008)
@@ -113,7 +113,7 @@ Attack scenarios 
   deployment scenario. The mitigations, their protection scope and impact

   are described in the next sections.



   The default mitigations and the rationale for chosing them are explained

   The default mitigations and the rationale for choosing them are explained

   at the end of this document. See :ref:`default_mitigations`.



.. _l1tf_sys_info:
@@ -191,8 +191,8 @@ Guest mitigation mechanisms 
    - unconditional ('always')



   The conditional mode avoids L1D flushing after VMEXITs which execute

   only audited code pathes before the corresponding VMENTER. These code

   pathes have beed verified that they cannot expose secrets or other

   only audited code paths before the corresponding VMENTER. These code

   paths have been verified that they cannot expose secrets or other

   interesting data to an attacker, but they can leak information about the

   address space layout of the hypervisor.
@@ -262,7 +262,7 @@ Guest mitigation mechanisms 
   Whether the interrupts with are affine to CPUs, which run untrusted

   guests, provide interesting data for an attacker depends on the system

   configuration and the scenarios which run on the system. While for some

   of the interrupts it can be assumed that they wont expose interesting

   of the interrupts it can be assumed that they won't expose interesting

   information beyond exposing hints about the host OS memory layout, there

   is no way to make general assumptions.
@@ -299,7 +299,7 @@ Guest mitigation mechanisms 
		 to be brought up at least partially and are then shut down

		 again.  "nosmt" can be undone via the sysfs interface.



     nosmt=force Has the same effect as "nosmt' but it does not allow to

     nosmt=force Has the same effect as "nosmt" but it does not allow to

		 undo the SMT disable via the sysfs interface.

     =========== ==========================================================