Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 18e738d7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-dt2-for-v4.11' of... 

Merge tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.11

Enhancements:
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs

Clean-up:
- Correct SATA device status on r8a7779/marzen

* tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: dts: r7s72100: add power-domains to mmcif
  ARM: dts: rskrza1: add ostm DT support
  ARM: dts: r7s72100: add ostm to device tree
  ARM: dts: r7s72100: add ostm clock to device tree
  ARM: dts: r8a7745: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7743: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7779, marzen: Fix sata device status

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 1a0c4ca5 5786ac14

arch/arm/boot/dts/r7s72100-rskrza1.dts

+8 −0
Original line number Diff line number Diff line
@@ -61,6 +61,14 @@ 
	status = "okay";

};



&ostm0 {

	status = "okay";

};



&ostm1 {

	status = "okay";

};



&scif2 {

	status = "okay";

};

arch/arm/boot/dts/r7s72100.dtsi

+28 −0
Original line number Diff line number Diff line
@@ -108,6 +108,15 @@ 
			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";

		};



		mstp5_clks: mstp5_clks@fcfe0428 {

			#clock-cells = <1>;

			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0xfcfe0428 4>;

			clocks = <&p0_clk>, <&p0_clk>;

			clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>;

			clock-output-names = "ostm0", "ostm1";

		};



		mstp7_clks: mstp7_clks@fcfe0430 {

			#clock-cells = <1>;

			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -466,6 +475,7 @@ 
			      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;

		power-domains = <&cpg_clocks>;

		reg-io-width = <4>;

		bus-width = <8>;

		status = "disabled";
@@ -496,4 +506,22 @@ 
		cap-sdio-irq;

		status = "disabled";

	};



	ostm0: timer@fcfec000 {

		compatible = "renesas,r7s72100-ostm", "renesas,ostm";

		reg = <0xfcfec000 0x30>;

		interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;

		clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};



	ostm1: timer@fcfec400 {

		compatible = "renesas,r7s72100-ostm", "renesas,ostm";

		reg = <0xfcfec400 0x30>;

		interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;

		clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};

};

arch/arm/boot/dts/r8a7743.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -60,6 +60,9 @@ 
			      <0 0xf1006000 0 0x2000>;

			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |

						 IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&cpg CPG_MOD 408>;

			clock-names = "clk";

			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;

		};



		irqc: interrupt-controller@e61c0000 {

arch/arm/boot/dts/r8a7745.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -60,6 +60,9 @@ 
			      <0 0xf1006000 0 0x2000>;

			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |

						 IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&cpg CPG_MOD 408>;

			clock-names = "clk";

			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;

		};



		irqc: interrupt-controller@e61c0000 {

arch/arm/boot/dts/r8a7779-marzen.dts

+4 −0
Original line number Diff line number Diff line
@@ -216,6 +216,10 @@ 
	};

};



&sata {

	status = "okay";

};



&scif2 {

	pinctrl-0 = <&scif2_pins>;

	pinctrl-names = "default";